HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 93

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HW-SPAR3E-SK-US-G

Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Datasheets

Specifications of HW-SPAR3E-SK-US-G

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
Spartan-3E FPGA Starter Kit Board User Guide
UG230 (v1.2) January 20, 2011
Creating an SPI Serial Flash PROM File
R
Setting the Configuration Clock Rate
The following steps describe how to format an FPGA bitstream for an SPI Serial Flash
PROM.
The FPGA supports a 12 MHz configuration clock rate when connected to an M25P16 SPI
serial Flash. Set the Properties for Generate Programming File so that the
Configuration Rate is 12, as shown in
Configuration Bitstream File” in the FPGA Configuration Options chapter for a
more detailed description.
Regenerate the FPGA bitstream programming file with the new settings.
Figure 12-5: Set Configuration Rate to 12 MHz When Using the M25P16 SPI Flash
www.xilinx.com
Figure
12-5. See “Generating the FPGA
Configuring from SPI Flash
UG230_c15_04_030206
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