DSPIC33FJ12MC201-I/SO Microchip Technology, DSPIC33FJ12MC201-I/SO Datasheet - Page 78

IC DSPIC MCU/DSP 12K 20SOIC

DSPIC33FJ12MC201-I/SO

Manufacturer Part Number
DSPIC33FJ12MC201-I/SO
Description
IC DSPIC MCU/DSP 12K 20SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC201-I/SO

Program Memory Type
FLASH
Program Memory Size
12KB (12K x 8)
Package / Case
20-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
15
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
15
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Table D-2
checksum when using CodeGuard™ Security with
Boot Segment Program Flash code protection with
Standard Security and small-sized boot Flash.
TABLE D-2:
DS70152H-page 78
dsPIC33FJ256GP506A
Note 1:
Device
provides an example of how to calculate the
CFGB1 = Byte sum of ((FBS & 0xCD) + (FSS & 0xCF) + (FGS & 0x07) + (FOSCSEL & 0xA7) +
(FOSC & 0xC7) + (FWDT & 0xFF) + (FPOR & 0xE7) + (FICD & 0xE3))
CHECKSUM COMPUTATION EXAMPLE WHEN USING CodeGuard™ SECURITY
Disabled
Read Code
Protection
CFGB1
(1)
+ SUM(0:2ABFF) – SUM(0200:07FE)
Checksum Computation
© 2010 Microchip Technology Inc.
Erased Value
0xFD01

Related parts for DSPIC33FJ12MC201-I/SO