AT89C51IC2-RLTIL Atmel, AT89C51IC2-RLTIL Datasheet - Page 95

• Manufacturer Part Number: AT89C51IC2-RLTIL
• Description: IC 8051 MCU FLASH 32K 44VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51IC2-RLTIL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

4301D–8051–02/08
(SSCS)
Status
Code
60h
68h
70h
78h
80h
88h
90h
Status of the 2-wire bus and
master; own SLA+W has been
General call address has been
Arbitration lost in SLA+R/W as
Arbitration lost in SLA+R/W as
received; NOT ACK has been
has been received; ACK has
master; general call address
own SLA+W; data has been
own SLA+W; data has been
general call; data has been
Previously addressed with
Previously addressed with
Previously addressed with
received; ACK has been
received; ACK has been
received; ACK has been
received; ACK has been
received; ACK has been
Own SLA+W has been
2-wire hardware
been returned
returned
returned
returned
returned
returned
returned
Table 70. Status in slave receiver mode
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
Read data byte or
Read data byte or
Read data byte or
Read data byte or
To/from SSDAT
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
Read data byte
Read data byte
Application Software Response
STA
X
X
X
X
X
X
X
X
X
X
0
0
1
1
X
X
To SSCON
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken By 2-wire Software
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START
condition will be transmitted when the bus
becomes free
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1. A START condition will be
transmitted when the bus becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
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