DSPIC33FJ128MC510-I/PT Microchip Technology, DSPIC33FJ128MC510-I/PT Datasheet - Page 14

IC DSPIC MCU/DSP 128K 100TQFP

DSPIC33FJ128MC510-I/PT

Manufacturer Part Number
DSPIC33FJ128MC510-I/PT
Description
IC DSPIC MCU/DSP 128K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC510-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
128KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC510-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
26. Module: Interrupt Controller
27. Module: Internal Voltage Regulator
TABLE 5:
DS80447D-page 14
Parameter No. Characteristic
Note 1:
If a clock failure occurs when the device is in Idle
mode, the oscillator failure trap does not vector to
the Trap Service Routine. Instead, the device will
simply wake-up from Idle mode and continue code
execution, if the Fail-Safe Clock Monitor (FSCM) is
enabled.
Work around
Whenever the device wakes up from Idle
(assuming the FSCM is enabled), the user
software should check the state of the OSCFAIL
bit (INTCON1<1>) to determine whether a clock
failure occurred, and then perform the appropriate
clock switch operation. Regardless, the Trap
Service Routine must be included in the user
application.
Affected Silicon Revisions
If a MCLR Reset pulse causes the device to wake-
up from Sleep mode, the device wakes up without
waiting for the on-chip voltage regulator to power-
up. This will subsequently result in a Brown-out
Reset (BOR).
Work around
None.
Affected Silicon Revisions
A2
A2
F20
X
X
2:
AC Characteristics
Frequency calibrated at 25°C and 3.3V. TUN bits can be used to compensate for temperature drift.
Devices set to initial frequency of 7.37 MHz (±2%) at 25°C.
A3
A3
X
X
INTERNAL FRC ACCURACY
A4
A4
X
X
Internal FRC Accuracy @ FRC Frequency = 7.37 MHz
Min.
Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated)
-3
Operating temperature -40°C < TA < +85°C for industrial
Typical
Max.
+3
28. Module: ECAN
29. Module: Oscillator
The C1RXOVF2 and C2RXOVF2 registers are
non-functional. They are always read back as
0x0000, even when a receive overflow has
occurred.
Work around
None.
Affected Silicon Revisions
The device does not meet the internal FRC
accuracy specifications in the data sheet (Table
23-18 of the “PIC24H Family Data Sheet”
(DS70175)). The actual accuracy specifications
are shown in Table 5.
Work around
None.
Affected Silicon Revisions
A2
A2
Units
X
X
%
A3
A3
X
X
-40°C < TA < +85°C V
A4
A4
X
X
(1,2)
© 2010 Microchip Technology Inc.
Conditions
DD
= 3.0-3.6V

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