DSPIC33FJ128MC510-I/PT Microchip Technology, DSPIC33FJ128MC510-I/PT Datasheet - Page 4

• Manufacturer Part Number: DSPIC33FJ128MC510-I/PT
• Description: IC DSPIC MCU/DSP 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC510-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 2.75V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 85
• Flash Memory Size: 128KB
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1001 - DSPIC33 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

TABLE 2:
DS80447D-page 4
Note 1:
Operations
Regulator
Oscillator
Module
Internal
Voltage
UART
UART
UART
UART
UART
DMA
DMA
DMA
CPU
PSV
SPI
I
I
I
I
I
2
2
2
2
2
C
C
C
C
C
Only those issues indicated in the last column apply to the current silicon revision.
Functionality
FRC Tuning
High-Speed
Write Mode
Write Mode
SFR Writes
Error Traps
Addressing
Addressing
Addressing
I
NULL Data
NULL Data
Auto-Baud
SCKx Pins
Instruction
PD
SILICON ISSUE SUMMARY (CONTINUED)
Interrupts
IR Mode
IR Mode
Feature
REPEAT
I/O Port
Mode
10-bit
Mode
10-bit
Mode
10-bit
Mode
Current
—
Number
Item
36.
37.
38.
39.
40.
41.
42.
43.
44.
45.
46.
47.
48.
49.
50.
51.
52.
53.
When the UART is in 4x mode (BRGH = 1) and using two Stop
bits (STSEL = 1), it may sample the first Stop bit instead of the
second one.
When an auto-baud is detected, the receive interrupt may
occur twice.
NULL Data Peripheral Write mode for the DMA channel does
not function.
DMA request Fault condition does not generate a DMA error
trap.
DMA channel writes an additional NULL value to the peripheral
register.
Any instruction executed inside a REPEAT loop that produces a
Read-After-Write stall condition, results in the instruction being
executed fewer times than was intended.
For certain values of the TUN<5:0> bits (OSCTUN<5:0>), the
resultant frequencies are incorrect.
The 16x baud clock signal on the BCLK pin is present only
when the module is transmitting.
The SPIxCON1 DISSCK bit does not influence port
functionality.
The BCL bit in I2CSTAT can be cleared only with 16-bit
operation and can be corrupted with 1-bit or 8-bit operations on
I2CSTAT.
When the I
the same address bits (A10 and A9) as other I
A10 and A9 bits may not work as expected.
When the I
address of 0x102, the I2CxRCV register content for the lower
address byte is 0x01 rather than 0x02.
With the I
Interrupt Input functions (if any) associated with SCL and SDA
pins will not reflect the actual digital logic levels on the pins.
The 10-bit slave does not set the RBF flag or load the
I2CxRCV register on address match if the Least Significant bits
of the address are the same as the 7-bit reserved addresses.
When the VREGS bit (RCON<8>) is set to a logic ‘0’, the
device may reset and higher sleep current may be observed.
An address error trap occurs in certain addressing modes
when accessing the first four bytes of any PSV page.
The UART error interrupt may not occur, or may occur at an
incorrect time, if multiple errors occur during a short period of
time.
When the UART module is operating in 8-bit mode
(PDSEL = 0x) and using the IrDA
(IREN = 1), the module incorrectly transmits a data payload of
80h as 00h.
2
C module enabled, the PORT bits and external
2
2
C module is configured for 10-bit addressing using
C module is configured as a 10-bit slave with an
Issue Summary
®
encoder/decoder
2
C devices, the
© 2010 Microchip Technology Inc.
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