AT91SAM7L128-CU Atmel, AT91SAM7L128-CU Datasheet - Page 106

• Manufacturer Part Number: AT91SAM7L128-CU
• Description: MCU ARM7 128K HS FLASH 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L128-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

17.3.3
17.3.4
17.3.4.1
106
AT91SAM7L128/64 Preliminary
Brownout Detector
Backup Power Supply Reset
Raising the Backup Power Supply
bypass mode, the OSCBYPASS bit of the Supply Controller Mode Register (SUPC_MR) needs
to be set at 1.
The Supply Controller embeds a Brownout Detector.
The Brownout Detector can be used to prevent the processor from falling into an unpredictable
state if the power supply drops below a certain level or to detect a battery discharge.
The threshold of the Brownout Detector is programmable. It can be selected from 1.9V to 3.4V
by steps of 100 mV. This threshold is programmed in the BODTH field of the Supply Controller
Brownout Mode Register, SUPC_BOMR.
The Brownout Detector can also be enabled during one slow clock period of either 32, 256 or
2048 slow clock periods. This can be configured by programming the BODSMPL field in
SUPC_BOMR.
Enabling the Brownout Detector for such reduced times allows to divide the typical Brownout
Detector power consumption respectively by factors of 32, 256 or 2048, if the user does not
need a continuous monitoring of the VDDIO1 Power Supply.
The Brownout Detector can either generate a reset of the Core or a wake up of the Core Power
Supply. Generating a Core reset when a brownout occurs is enabled by writing the BODRSTEN
bit to 1 in SUPC_BOMR.
Waking up the Core Power Supply when a brownout occurs can be enabled by programming the
BODEN bit to 1 in the Supply Controller Wake Up Mode Register, SUPC_WUMR.
Powering VDDIO1 does not power the device since FWUP is not asserted. If the FWUP pin is
not used, it shall be connected to GND.
When the FWUP pin is tied to GND, the backup power supply is enabled. The RC oscillator is
powered up and the zero-power power-on reset cell maintains its output for a time longer than
the startup of the RC oscillator. During this time, the Supply Controller is entirely reset. When
this signal is released a counter is started for 30 slow clock cycles. This is the debouncing of the
Force Wake Up pin. If the FWUP pin is not maintained low, the backup power supply is powered
off.
If the FWUP pin is maintained low, the signal, supply_on is asserted, thus auto-maintaining the
backup power supply. The FWUP pin becomes a wake up source.
At the same time the supply_on signal is asserted, the voltage regulator, the Flash Memory and
the SRAM are powered up according to the User Interface reset state. The voltage regulator
starts and provides the vr_ok signal as soon as its output is valid. This results in releasing the
vddcore_nreset signal to the Reset Controller after the vr_ok signal has been confirmed as
being valid for at least one slow clock cycle.
At the same time the voltage regulator is powered up, the Supply Controller and all of the
devices supplied by the backup power supply, are correctly started. The Supply Controller also
sets the status bit, FWUPS in the Supply Controller Status Register, SUPC_SR. This status bit is
cleared as soon as SUPC_SR is read and indicates the first power up of the backup power
supply.
6257A–ATARM–20-Feb-08