AT91SAM7L128-CU Atmel, AT91SAM7L128-CU Datasheet - Page 71

MCU ARM7 128K HS FLASH 144-LFBGA

AT91SAM7L128-CU

Manufacturer Part Number
AT91SAM7L128-CU
Description
MCU ARM7 128K HS FLASH 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7L128-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
36MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.55 V ~ 1.8 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
6 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
80
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Price
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14.4.5
6257A–ATARM–20-Feb-08
Updating Time/Calendar
Note:
To update any of the time/calendar fields, the user must first stop the RTC by setting the corre-
sponding field in the Control Register. Bit UPDTIM must be set to update time fields (hour,
minute, second) and bit UPDCAL must be set to update calendar fields (century, year, month,
date, day).
Then the user must poll or wait for the interrupt (if enabled) of bit ACKUPD in the Status Regis-
ter. Once the bit reads 1, it is mandatory to clear this flag by writing the corresponding bit in
RTC_SCCR. The user can now write to the appropriate Time and Calendar register.
Once the update is finished, the user must reset (0) UPDTIM and/or UPDCAL in the Control
When entering programming mode of the calendar fields, the time fields remain enabled. When
entering the programming mode of the time fields, both time and calendar fields are stopped.
This is due to the location of the calendar logic circuity (downstream for low-power consider-
ations). It is highly recommended to prepare all the fields to be updated before entering
programming mode. In successive update operations, the user must wait at least one second
after resetting the UPDTIM/UPDCAL bit in the RTC_CR (Control Register) before setting these
bits again. This is done by waiting for the SEC flag in the Status Register before setting
UPDTIM/UPDCAL bit. After resetting UPDTIM/UPDCAL, the SEC flag must also be cleared.
1. Century (check if it is in range 19 - 20)
2. Year (BCD entry check)
3. Date (check range 01 - 31)
4. Month (check if it is in BCD range 01 - 12, check validity regarding “date”)
5. Day (check range 1 - 7)
6. Hour (BCD checks: in 24-hour mode, check range 00 - 23 and check that AM/PM flag is
7. Minute (check BCD and range 00 - 59)
8. Second (check BCD and range 00 - 59)
not set if RTC is set in 24-hour mode; in 12-hour mode check range 01 - 12)
If the 12-hour mode is selected by means of the RTC_MODE register, a 12-hour value can be pro-
grammed and the returned value on RTC_TIME will be the corresponding 24-hour value. The
entry control checks the value of the AM/PM indicator (bit 22 of RTC_TIME register) to determine
the range to be checked.
AT91SAM7L128/64 Preliminary
71

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