MC908LD64IFUE Freescale Semiconductor, MC908LD64IFUE Datasheet - Page 307

• Manufacturer Part Number: MC908LD64IFUE
• Description: IC MCU 8BIT FOR LCD 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LD64IFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 6MHz
• Connectivity: I²C, USB
• Peripherals: OSD, POR, PWM
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LD
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, USB
• Maximum Clock Frequency: 6 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.6.2 Data Direction Register D
MC68HC908LD64
Freescale Semiconductor
—
Rev. 3.0
Address:
HOUT— Sync Processor HOUT Pulse Output Pin
VOUT — Sync Processor VOUT Pulse Output Pin
DE — Sync Processor DE Pulse Output Pin
DCLK — Sync Processor DCLK Pulse Output Pin
Data direction register D (DDRD) determines whether each port D pin is
an input or an output. Writing a logic 1 to a DDRD bit enables the output
buffer for the corresponding port D pin; a logic 0 disables the output
buffer.
Reset:
Read:
Write:
The PTD3/HOUT pin is the sync processor HOUT pulse output pin.
When the HOUTE bit in the port D control register (PDCR) is clear,
the PTD3/HOUT pin is available for general-purpose I/O. (See
Port D
The PTD2/VOUT pin is the sync processor VOUT pulse output pin.
When the VOUTE bit in the port D control register (PDCR) is clear, the
PTD2/VOUT pin is available for general-purpose I/O. (See
Port D
The PTD1/DE pin is the sync processor DE pulse output pin. When
the DEE bit in the port D control register (PDCR) is clear, the
PTD1/DE pin is available for general-purpose I/O. (See
Options.)
The PTD0/DCLK pin is the sync processor DCLK pulse output pin.
When the DCLKE bit in the port D control register (PDCR) is clear, the
PTD0/DCLK pin is available for general-purpose I/O. (See
Port D
DDRD7
$0007
Bit 7
Figure 19-14. Data Direction Register D (DDRD)
0
Options.)
Options.)
Options.)
Input/Output (I/O) Ports
DDRD6
6
0
DDRD5
5
0
DDRD4
4
0
DDRD3
3
0
DDRD2
2
0
Input/Output (I/O) Ports
DDRD1
19.6.3 Port D
1
0
19.6.3
19.6.3
Data Sheet
19.6.3
DDRD0
Bit 0
Port D
0
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