MC9S12E256MPVE Freescale Semiconductor, MC9S12E256MPVE Datasheet - Page 132

• Manufacturer Part Number: MC9S12E256MPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 3 Port Integration Module (PIM9E256V1)
3.3.1.4
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
3.3.1.5
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
132
PERAD[15:0]
RDRAD[15:0]
Reset
Reset
Reset
Reset
Field
Field
15:0
15:0
W
W
W
W
R
R
R
R
RDRAD15
PERAD15
RDRAD7
PERAD7
Pull Device Enable Port AD
0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Port AD Reduced Drive Register (RDRAD)
Port AD Pull Device Enable Register (PERAD)
Reduced Drive Port AD
0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
0
0
0
0
7
7
7
7
RDRAD14
PERAD14
RDRAD6
PERAD6
Figure 3-6. Port AD Pull Device Enable Register (PERAD)
0
0
0
0
6
6
6
6
Figure 3-5. Port AD Reduced Drive Register (RDRAD)
RDRAD13
Table 3-4. RDRAD Field Descriptions
PERAD13
Table 3-5. PERAD Field Descriptions
RDRAD5
PERAD5
MC9S12E256 Data Sheet, Rev. 1.08
0
0
0
0
5
5
5
5
RDRAD12
PERAD12
RDRAD4
PERAD4
0
0
0
0
4
4
4
4
Description
Description
RDRAD11
PERAD11
RDRAD3
PERAD3
3
0
3
0
3
0
3
0
RDRAD10
PERAD10
RDRAD2
PERAD2
0
0
0
0
2
2
2
2
RDRAD9
RDRAD1
PERAD9
PERAD1
Freescale Semiconductor
0
0
0
0
1
1
1
1
RDRAD8
RDRAD0
PERAD8
PERAD0
0
0
0
0
0
0
0
0