MC9S12E256MPVE Freescale Semiconductor, MC9S12E256MPVE Datasheet - Page 140

IC MCU 256K FLASH 25MHZ 112-LQFP

MC9S12E256MPVE

Manufacturer Part Number
MC9S12E256MPVE
Description
IC MCU 256K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E256MPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12E256MPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 3 Port Integration Module (PIM9E256V1)
3.3.2.7
Read: Anytime. Write: Anytime.
This register selects whether a port M output is configured as push-pull or wired-OR. When a Wired-OR
Mode Register bit is set to 1, the corresponding output pin is driven active low only (open drain) and a high
level is not driven. A Wired-OR Mode Register bit has no effect if the corresponding pin is configured as
an input.
These bits apply also to the SCI2 outputs and allow a multipoint connection of several serial modules.
If the IIC is enabled, the associated pins are always set to wired-OR mode, and the state of the
WOMM[7:6] bits have no effect. The WOMM[7:6] bits will not change to reflect their wired-OR mode
configuration when the IIC is enabled.
140
WOMM[7:4]
Reset
Field
7:4
W
R
WOMM7
Wired-OR Mode Port M
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
Port M Wired-OR Mode Register (WOMM)
0
7
= Reserved or Unimplemented
WOMM6
0
6
Figure 3-16. Port M Wired-OR Mode Register (WOMM)
Table 3-13. WOMM Field Descriptions
WOMM5
MC9S12E256 Data Sheet, Rev. 1.08
0
5
WOMM4
0
4
Description
3
0
0
0
0
2
Freescale Semiconductor
0
0
1
0
0
0

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