MC9S12E256MPVE Freescale Semiconductor, MC9S12E256MPVE Datasheet - Page 327

• Manufacturer Part Number: MC9S12E256MPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
INDEPC
INDEPB
INDEPA
EDGEA
Field
3
2
1
0
Edge-Aligned or Center-Aligned PWM for Pair A — This bit determines whether PWM0 and PWM1 channels
will use edge-aligned or center-aligned waveforms. It determines waveforms for Pair B and Pair C if the MTG bit
is cleared. This bit cannot be modified after the WP bit is set.
0 PWM0 and PWM1 are center-aligned PWMs
1 PWM0 and PWM1 are edge-aligned PWMs
Independent or Complimentary Operation for Pair C — This bit determines if the PWM channels 4 and 5 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM4 and PWM5 are complementary PWM pair
1 PWM4 and PWM5 are independent PWMs
Independent or Complimentary Operation for Pair B — This bit determines if the PWM channels 2 and 3 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM2 and PWM3 are complementary PWM pair
1 PWM2 and PWM3 are independent PWMs
Independent or Complimentary Operation for Pair A — This bit determines if the PWM channels 0 and 1 will
be independent PWMs or complementary PWMs. This bit cannot be modified after the WP bit is set.
0 PWM0 and PWM1 are complementary PWM pair
1 PWM0 and PWM1 are independent PWMs
Table 11-2. PMFCFG0 Field Descriptions (continued)
MC9S12E256 Data Sheet, Rev. 1.08
Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
Description
327