MC9S12E256MPVE Freescale Semiconductor, MC9S12E256MPVE Datasheet - Page 574

• Manufacturer Part Number: MC9S12E256MPVE
• Description: IC MCU 256K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Appendix A Electrical Characteristics
A.3.3
The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)
is also the system clock source in self clock mode.
A.3.3.1
This section describes the selection of the XFC components to achieve a good filter characteristics.
The following procedure can be used to calculate the resistance and capacitance values using typical values
for K
The grey boxes show the calculation for f
for f
The VCO Gain at the desired VCO frequency is approximated by:
The phase detector relationship is given by:
i
574
ch
is the current in tracking mode.
OSC
1
, f
1
= 4MHz and a 25MHz bus clock.
f
and i
osc
Phase Locked Loop
XFC Component Selection
ch
from
refdv+1
1
Table
K
V
=
A-13.
f
ref
K
1
VDDPLL
Figure A-2. Basic PLL Functional Diagram
e
K
--------------------------- -
f 1 f vco
K 1 1V
MC9S12E256 Data Sheet, Rev. 1.08
=
–
–
VCO
f
cmp
i
ch
C
p
C
= 50MHz and f
=
s
Detector
K
Loop Divider
Phase
–
V
100
synr+1
K
1
R
= 316.7Hz/
e
----------------------- -
60 50
–
100
–
ref
= 1MHz. E.g., these frequencies are used
XFC Pin
= -90.48MHz/V
1
2
VCO
K
V
Freescale Semiconductor
f
vco