EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 165

• Manufacturer Part Number: EP9312-IBZ
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IBZ

• Core Size: 16/32-Bit
• Package / Case: 352-BGA
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Controller Family/series: (ARM9)
• A/d Converter: 12 Bits
• No. Of I/o Pins: 65
• Clock Frequency: 200MHz
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1260

DS785UM1
6.1.2 Interrupt Configuration
Any 16 of the 32 interrupts (per VIC) can be designated as ‘vectored’ by programming the
Vector address registers,
‘VICxVectCntl0,’ on page
An interrupt is designated as either IRQ or FIQ by programming the
The IRQ and FIQ request logic has an asynchronous path. This allows interrupts to be
asserted when the clock is disabled.
Software can generate a specific interrupt by writing a ‘1’ to the associated bit in the
VICxSoftInt
Table 6-1
VIC Interrupt
Source
shows Interrupt Configuration.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
register.
0
1
2
3
4
5
6
7
8
9
UART1RXINTR1
UART2RXINTR2
UART3RXINTR3
UART2TXINTR2
UART3TXINTR3
UART1TXINTR1
INT_TOUCH
DMAM2M0
DMAM2M1
DMAM2P0
DMAM2P1
DMAM2P2
DMAM2P3
DMAM2P4
DMAM2P5
DMAM2P6
DMAM2P7
DMAM2P8
DMAM2P9
COMMRX
COMMTX
AACINTR
INT_KEY
6-17.
‘VICxVectAddr0’ on page 6-15
Name
TC1UI
TC2UI
-
-
-
-
-
-
-
Copyright 2007 Cirrus Logic
Table 6-1. Interrupt Configuration
TC1 under flow interrupt (Timer Counter 1)
TC2 under flow interrupt (Timer Counter 2)
DMA Memory to Peripheral Interrupt 0
DMA Memory to Peripheral Interrupt 1
DMA Memory to Peripheral Interrupt 2
DMA Memory to Peripheral Interrupt 3
DMA Memory to Peripheral Interrupt 4
DMA Memory to Peripheral Interrupt 5
DMA Memory to Peripheral Interrupt 6
DMA Memory to Peripheral Interrupt 7
DMA Memory to Peripheral Interrupt 8
DMA Memory to Peripheral Interrupt 9
DMA Memory to Memory Interrupt 0
DMA Memory to Memory Interrupt 1
ARM Communication Rx for Debug
ARM Communication Tx for Debug
Touch Screen Controller Interrupt
Advanced Audio Codec interrupt
UART 1 Transmit Interrupt
UART 2 Transmit Interrupt
UART 3 Transmit Interrupt
UART 1 Receive Interrupt
UART 2 Receive Interrupt
UART 3 Receive Interrupt
Keyboard Matrix Interrupt
and the Vector Control registers,
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Unused
Unused
Vectored Interrupt Controller
VICxIntSelect
EP93xx User’s Guide
register.
6-3
6