EP9312-IBZ Cirrus Logic Inc, EP9312-IBZ Datasheet - Page 240

• Manufacturer Part Number: EP9312-IBZ
• Description: IC ARM920T MCU 200MHZ 352-PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-IBZ

• Core Size: 16/32-Bit
• Package / Case: 352-BGA
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Controller Family/series: (ARM9)
• A/d Converter: 12 Bits
• No. Of I/o Pins: 65
• Clock Frequency: 200MHz
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1260

7
7-58
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
C:
M:
M3
C3
0
0
0
X
1
0
0
0
0
0
C2
M2
X
0
1
1
1
0
0
0
0
1
Table 7-13. Color Mode Definition Table
Table 7-14. Blink Mode Definition Table
M1
C1
0
0
0
1
X
0
0
1
1
0
Copyright 2007 Cirrus Logic
Writing a Dual Scan value to this bit selects whether the
display is used in single scan mode, or dual scan mode
where the display is divided into a ‘top’ half and a ‘bottom’
half. In dual scan mode, the video frame buffer in SDRAM
must be organized such that ‘top’ and ‘bottom’ pixels
alternate in consecutive locations. ‘Top’ and ‘bottom’ pixels
are fetched and input to the Raster Engine’s video
pipeline. The output shifter is set up to drive the top and
bottom half screen data at the same time. Dual scan mode
is intended for passive matrix LCD screens that require
both halves of the screen to be scanned out at the same
time. However, dual scan mode could also be used to
drive two separate synchronized displays, each with
different data.
0 - Single Scan (full page)
1 - Dual Scan (two half pages)
Color - Read/Write
The Color Mode is specified by selecting a value from
Table 7-13
Mode - Read/Write
The Blink Mode is specified by selecting a value from
Table 7-14
C0
M0
X
0
0
1
0
0
1
0
1
0
and writing it to this field.
and writing it to this field.
Blink to background register Value
Pixels ANDed with Blink Mask
Pixels ORed with Blink Mask
Grayscale Palettes Enabled
Triple 8 bits per channel
XORed with Blink Mask
16-bit 565 color mode
16-bit 555 color mode
Blink Mode Disabled
Use LUT Data
Color Mode
Blink Mode
DS785UM1