C8051F544-IM Silicon Laboratories Inc, C8051F544-IM Datasheet - Page 168

IC 8051 MCU 8K FLASH 32-QFN

C8051F544-IM

Manufacturer Part Number
C8051F544-IM
Description
IC 8051 MCU 8K FLASH 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F54xr
Datasheets

Specifications of C8051F544-IM

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
32-QFN
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), LIN, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Operating Supply Voltage
1.8 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F540DK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1672 - BOARD PROTOTYPE W/C8051F540336-1669 - KIT DEVELOPMENT FOR C8051F540
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1677-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F544-IM
Manufacturer:
Silicon Labs
Quantity:
135
C8051F54x
SFR Definition 18.25. P3MDIN: Port 3 Input Mode
SFR Address = 0xF4; SFR Page = 0x0F
SFR Definition 18.26. P3MDOUT: Port 3 Output Mode
SFR Address = 0xAE; SFR Page = 0x0F
168
Note: Port P3.0 is only available on the 32-pin packages.
Note: Port P3.0 is only available on the 32-pin packages.
Name
Reset
Name
Reset
7:1
7:1
7:0 P3MDOUT[7:0] Output Configuration Bits for P3.0.
Bit
Bit
Type
Type
0
Bit
Bit
P3MDIN[0]
Unused
Unused
Name
Name
R
7
0
R
7
1
Read = 0000000b; Write = Don’t Care.
Analog Configuration Bits for P3.0.
Port pins configured for analog mode have their weak pull-up and digital receiver
disabled. For analog mode, the pin also needs to be configured for open-drain
mode in the P3MDOUT register.
0: Corresponding P3.n pin is configured for analog mode.
1: Corresponding P3.n pin is not configured for analog mode.
Read = 0000000b; Write = Don’t Care.
These bits are ignored if the corresponding bit in register P3MDIN is logic 0.
0: Corresponding P3.n Output is open-drain.
1: Corresponding P3.n Output is push-pull.
R
6
0
R
6
1
R
5
0
R
5
1
R
4
0
Rev. 1.1
R
4
1
R
3
0
Function
Function
R
3
1
R
2
0
R
2
1
R
1
0
R
1
1
P3MDOUT[0]
P3MDIN[0]
R/W
R/W
0
0
0
1

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