ATMEGA8U2-MU Atmel, ATMEGA8U2-MU Datasheet - Page 135

• Manufacturer Part Number: ATMEGA8U2-MU
• Description: MCU AVR 8K FLASH USB 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8U2-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
• Minimum Operating Temperature: - 40 C
• Package: 32QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

16.11.5
16.11.6
16.11.7
16.11.8
16.11.9
7799D–AVR–11/10
OCR1AH and OCR1AL – Output Compare Register 1 A
OCR1BH and OCR1BL – Output Compare Register 1 B
OCR1CH and OCR1CL – Output Compare Register 1 C
ICR1H and ICR1L – Input Capture Register 1
TIMSK1 – Timer/Counter1 Interrupt Mask Register
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers.
IThe Input Capture is updated with the counter (TCNTn) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers.
Bit
(0x89)
(0x88)
Read/Write
Initial Value
Bit
(0x8B)
(0x8A)
Read/Write
Initial Value
Bit
(0x8D)
(0x8C)
Read/Write
Initial Value
Bit
(0x87)
(0x86)
Read/Write
Initial Value
Bit
(0x6F)
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 110.
See “Accessing 16-bit Registers” on page 110.
R/W
R/W
R/W
R/W
R
7
0
7
0
7
0
7
0
7
–
0
R/W
R/W
R/W
R/W
R
6
0
6
0
6
0
6
0
6
–
0
ICIE1
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
R
4
–
0
4
OCR1A[15:8]
0
4
OCR1B[15:8]
0
4
OCR1C[15:8]
0
4
0
OCR1A[7:0]
OCR1B[7:0]
OCR1C[7:0]
ICR1[15:8]
ICR1[7:0]
ATmega8U2/16U2/32U2
OCIE1C
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
OCIE1B
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
OCIE1A
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
TOIE1
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
OCR1AH
OCR1BH
OCR1CH
OCR1AL
OCR1BL
OCR1CL
TIMSK1
ICR1H
ICR1L
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