ATMEGA8U2-MU Atmel, ATMEGA8U2-MU Datasheet - Page 58

• Manufacturer Part Number: ATMEGA8U2-MU
• Description: MCU AVR 8K FLASH USB 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8U2-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, AT90USBKEY, ATEVK525
• Minimum Operating Temperature: - 40 C
• Package: 32QFN EP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Table 10-3.
7799D–AVR–11/10
WDP3
0
0
0
0
0
0
0
0
1
1
WDP2
Watchdog Timer Prescale Select, DIV = 0 (CLKwdt = CLK128 / 1)
0
0
0
0
1
1
1
1
0
0
WDP1
0
0
1
1
0
0
1
1
0
0
• Bit 3 - WDEWIF: Watchdog Early Warning Interrupt Flag
This bit is set when a first time-out occurs in the Watchdog Timer and if the WDEWIE bit is
enabled. WDEWIF is automatically cleared by hardware when executing the corresponding
interrupt handling vector. Alternatively, WDIF can be cleared by writing a logic one to the flag.
When the I-bit in SREG and WDEWIE are set, the Watchdog Time-out Interrupt is executed.
• Bit 2 - WDEWIE: Watchdog Early Warning Interrupt Enable
When this bit has been set by software, an interrupt will be generated on the watchdog interrupt
vector when the Early warning flag is set to one by hardware.
• Bit 1:0 - WCLKD[1:0]: Watchdog Timer Clock Divider
Table 10-2.
WCLKD2
WDP0
0
0
0
0
1
1
1
1
0
1
0
1
0
1
0
1
0
1
Watchdog Timer Clock Divider Configuration
Number of WDT Oscillator
Cycles before 1st time-out
1024K (1048576) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
2K (2048) cycles
4K (4096) cycles
8K (8192) cycles
(Early warning)
WCLKD1
0
0
1
1
0
0
1
1
WCLKD0
0
1
0
1
0
1
0
1
Early warning Typical
ATmega8U2/16U2/32U2
Time-out at
V
CC
0.125 s
16 ms
32 ms
64 ms
0.25 s
0.5 s
1.0 s
2.0 s
4.0 s
8.0 s
Mode
Clk
Clk
Clk
Clk
Clk
Clk
Clk
Clk
= 5.0V
WDT
WDT
WDT
WDT
WDT
WDT
WDT
WDT
= Clk
= Clk
= Clk
= Clk
= Clk
= Clk
= Clk
= Clk
128k
128k
128k
128k
128k
128k
128k
128k
Reset/Interrupt Typical
/ 3
/ 5
/ 7
/ 9
/ 11
/ 13
/ 15
Time-out at
V
Watchdog
CC
128 ms
0.250 s
32 ms
64 ms
16.0 s
0.5 s
1.0 s
2.0 s
4.0 s
8.0 s
= 5.0V
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