ATTINY26L-8PU Atmel, ATTINY26L-8PU Datasheet - Page 118

IC MCU AVR 2K 5V 8MHZ 20-DIP

ATTINY26L-8PU

Manufacturer Part Number
ATTINY26L-8PU
Description
IC MCU AVR 2K 5V 8MHZ 20-DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY26L-8PU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
2-Wire/ISP/SM-Bus/SPI/UART/USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Controller Family/series
AVR Tiny
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
128Byte
Cpu Speed
8MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATTINY26L-8PJ
ATTINY26L-8PJ

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY26L-8PU
Manufacturer:
Atmel
Quantity:
25 295
Part Number:
ATTINY26L-8PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Reading the Signature Bytes
Reading the Calibration Byte
Parallel Programming
Characteristics
118
ATtiny26(L)
Figure 63. Mapping Between BS1, BS2 and the Fuse- and Lock-bits During Read
The algorithm for reading the Signature bytes is as follows (refer to Programming the
Flash for details on Command and Address loading):
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte ($00 - $02).
3. Set OE to “0” and BS1 to “0”. The selected Signature byte can now be read at
4. Set OE to “1”.
The algorithm for reading the Calibration byte is as follows (refer to Programming the
Flash for details on Command and Address loading):
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte.
3. Set OE to “0” and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
Figure 64. Parallel Programming Timing, Including some General Timing
Requirements
(DATA, XA0, XA1/BS2
DATA.
Fuse Low Byte
Fuse High Byte
Data & Contol
PAGEL/BS1)
Lock Bits
RDY/BSY
XTAL1
WR
BS2
t
DVXH
t
XHXL
0
1
t
t
XLDX
XLWL
t
BVWL
t
WLWH
WLRL
BS1
0
1
t
WLBX
1477F–AVR–12/04
DATA
t
WLRH

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