AT91SAM7S32B-AU-999 Atmel, AT91SAM7S32B-AU-999 Datasheet - Page 736

IC MCU ARM7 32KB FLASH 48LQFP

AT91SAM7S32B-AU-999

Manufacturer Part Number
AT91SAM7S32B-AU-999
Description
IC MCU ARM7 32KB FLASH 48LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7S32B-AU-999

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, JTAG, SPI, USART
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
21
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S32B-AU-999
Manufacturer:
Atmel
Quantity:
10 000
40.20.9.2
40.20.9.3
40.20.9.4
40.20.9.5
40.20.10 Voltage Regulator
40.20.10.1
40.20.10.2
736
AT91SAM7S Series Preliminary
USART: CTS in Hardware Handshaking
USART: Hardware Handshaking – Two Characters Sent
USART: XOFF Character Bad Behavior
USART: DCD is active High instead of Low
Voltage Regulator: Current Consumption in Deep Mode
Voltage Regulator: Load Versus Temperature
When Hardware Handshaking is used and if CTS goes low near the end of the starting bit, a
character can be lost.
CTS must not go low during a time slot occurring between 2 Master Clock periods before the
starting bit and 16 Master Clock periods after the rising edge of the starting bit.
If CTS switches from 0 to 1 during the TX of a character and if the holding register (US_THR) is
not empty, the content of US_THR will also be transmitted.
Don't use the PDC in transmit mode and do not fill US_THR before TXEMPTY is set at 1.
The XOFF character is sent only when the receive buffer is detected full. While the XOFF is
being sent, the remote transmitter is still transmitting. As only one Holding register is available in
the receiver, characters will be lost in reception. This makes the software handshaking function-
ality ineffective.
None.
The DCD signal is active at High level in the USART Modem Mode.
DCD should be active at Low level.
Add an inverter.
Current consumption in Deep Mode is maximum 60 µA instead of 25 µA.
Due to current rejection from VDDIN to VDDCORE, the current consumption in Deep Mode can-
not be guaranteed. Instead, 60 µA is guaranteed whatever the condition.
None.
Maximum load is 50 mA at 85 °C (instead of 100 mA).
Maximum load is 100 mA at 70°C.
None.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
6175K–ATARM–30-Aug-10

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