ATMEGA3250-16AUR Atmel, ATMEGA3250-16AUR Datasheet - Page 124

• Manufacturer Part Number: ATMEGA3250-16AUR
• Description: MCU AVR 32K FLASH 16MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA3250-16AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2570M–AVR–04/11
Table 16-3
PWM mode.
Table 16-3.
Note:
Table 16-4
correct or the phase and frequency correct, PWM mode.
Table 16-4.
Note:
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
COM1A1/COM1B1
COM1A1/COM1B1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
0
0
1
1
0
0
1
1
this case the compare match is ignored, but the set or clear is done at BOTTOM.
PWM Mode” on page 115.
“Phase Correct PWM Mode” on page 117.
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast
Compare Output Mode, Fast PWM
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
COM1A0/COM1B0
COM1A0/COM1B0
0
1
0
1
0
1
0
1
Table
for more details.
16-5. Modes of operation supported by the Timer/Counter
Description
Normal port operation, OC1A/OC1B
disconnected.
WGM13:0 = 14 or 15: Toggle OC1A on Compare
Match, OC1B disconnected (normal port
operation). For all other WGM1 settings, normal
port operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match, set
OC1A/OC1B at BOTTOM (non-inverting mode).
Set OC1A/OC1B on Compare Match, clear
OC1A/OC1B at BOTTOM (inverting mode).
Description
Normal port operation, OC1A/OC1B
disconnected.
WGM13:0 = 9 or 11: Toggle OC1A on Compare
Match, OC1B disconnected (normal port
operation). For all other WGM1 settings, normal
port operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match when up-
counting. Set OC1A/OC1B on Compare Match
when counting down.
Set OC1A/OC1B on Compare Match when up-
counting. Clear OC1A/OC1B on Compare Match
when counting down.
(See “Modes of Operation” on page
ATmega325/3250/645/6450
(1)
for more details.
114.).
See “Fast
See
124