ATMEGA3250-16AUR Atmel, ATMEGA3250-16AUR Datasheet - Page 18

• Manufacturer Part Number: ATMEGA3250-16AUR
• Description: MCU AVR 32K FLASH 16MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA3250-16AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7. AVR Memories
7.1
2570M–AVR–04/11
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the Atmel ATmega325/3250/645/6450. The
AVR architecture has two main memory spaces, the Data Memory and the Program Memory
space. In addition, the Atmel ATmega325/3250/645/6450 features an EEPROM Memory for
data storage. All three memory spaces are linear.
The Atmel ATmega325/3250/645/6450 contains 32/64K bytes On-chip In-System Reprogram-
mable Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the
Flash is organized as 16/32K x 16. For software security, the Flash Program memory space is
divided into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The Atmel
ATmega325/3250/645/6450 Program Counter (PC) is 14/15 bits wide, thus addressing the
16/32K program memory locations. The operation of Boot Program section and associated Boot
Lock bits for software protection are described in detail in
Write Self-Programming” on page
description on Flash data serial downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7-1.
14.
Program Memory Map
Application Flash Section
Boot Flash Section
Program Memory
251.
“Memory Programming” on page 265
ATmega325/3250/645/6450
“Boot Loader Support – Read-While-
0x0000
0x3FFF/0x7FFF
“Instruction Execution Tim-
contains a detailed
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