ATMEGA3250-16AUR Atmel, ATMEGA3250-16AUR Datasheet - Page 69

• Manufacturer Part Number: ATMEGA3250-16AUR
• Description: MCU AVR 32K FLASH 16MHZ 100TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA3250-16AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ATmega325/3250/645/6450
• OC1A/PCINT13, Bit 5
OC1A, Output Compare Match A output: The PB5 pin can serve as an external output for the
Timer/Counter1 Output Compare A. The pin has to be configured as an output (DDB5 set (one))
to serve this function. The OC1A pin is also the output pin for the PWM mode timer function.
PCINT13, Pin Change Interrupt Source 13: The PB5 pin can serve as an external interrupt
source.
• OC0A/PCINT12, Bit 4
OC0A, Output Compare Match A output: The PB4 pin can serve as an external output for the
Timer/Counter0 Output Compare A. The pin has to be configured as an output (DDB4 set (one))
to serve this function. The OC0A pin is also the output pin for the PWM mode timer function.
PCINT12, Pin Change Interrupt Source 12: The PB4 pin can serve as an external interrupt
source.
• MISO/PCINT11 – Port B, Bit 3
MISO: Master Data input, Slave Data output pin for SPI. When the SPI is enabled as a Master,
this pin is configured as an input regardless of the setting of DDB3. When the SPI is enabled as
a Slave, the data direction of this pin is controlled by DDB3. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB3 bit.
PCINT11, Pin Change Interrupt Source 11: The PB3 pin can serve as an external interrupt
source.
• MOSI/PCINT10 – Port B, Bit 2
MOSI: SPI Master Data output, Slave Data input for SPI. When the SPI is enabled as a Slave,
this pin is configured as an input regardless of the setting of DDB2. When the SPI is enabled as
a Master, the data direction of this pin is controlled by DDB2. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB2 bit.
PCINT10, Pin Change Interrupt Source 10: The PB2 pin can serve as an external interrupt
source.
• SCK/PCINT9 – Port B, Bit 1
SCK: Master Clock output, Slave Clock input pin for SPI. When the SPI is enabled as a Slave,
this pin is configured as an input regardless of the setting of DDB1. When the SPI is enabled as
a Master, the data direction of this pin is controlled by DDB1. When the pin is forced to be an
input, the pull-up can still be controlled by the PORTB1 bit.
PCINT9, Pin Change Interrupt Source 9: The PB1 pin can serve as an external interrupt source.
• SS/PCINT8 – Port B, Bit 0
SS: Slave Port Select input. When the SPI is enabled as a Slave, this pin is configured as an
input regardless of the setting of DDB0. As a Slave, the SPI is activated when this pin is driven
low. When the SPI is enabled as a Master, the data direction of this pin is controlled by DDB0.
When the pin is forced to be an input, the pull-up can still be controlled by the PORTB0 bit
PCINT8, Pin Change Interrupt Source 8: The PB0 pin can serve as an external interrupt source.
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