PIC18F26J50-I/SP Microchip Technology, PIC18F26J50-I/SP Datasheet - Page 105

IC PIC MCU FLASH 64K 2V 28-DIP

PIC18F26J50-I/SP

Manufacturer Part Number
PIC18F26J50-I/SP
Description
IC PIC MCU FLASH 64K 2V 28-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F26J50-I/SP

Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART/I2C/SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8.0
8.1
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to
be completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms and
allows the PIC18 devices to be used in many applica-
tions previously reserved for digital signal processors.
A comparison of various hardware and software
multiply operations, along with the savings in memory
and execution time, is shown in Table 8-1.
8.2
Example 8-1 shows the instruction sequence for an 8 x 8
unsigned multiplication. Only one instruction is required
when one of the arguments is already loaded in the
WREG register.
Example 8-2 shows the sequence to do an 8 x 8 signed
multiplication. To account for the sign bits of the argu-
ments, each argument’s Most Significant bit (MSb) is
tested and the appropriate subtractions are done.
TABLE 8-1:
© 2008 Microchip Technology Inc.
16 x 16 unsigned
8 x 8 unsigned
16 x 16 signed
8 x 8 signed
Routine
8 x 8 HARDWARE MULTIPLIER
Introduction
Operation
PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS
Without hardware multiply
Without hardware multiply
Without hardware multiply
Without hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Multiply Method
Preliminary
Program
Memory
(Words)
13
33
21
28
52
35
1
6
EXAMPLE 8-1:
EXAMPLE 8-2:
PIC18F2XK20/4XK20
MOVF
MULWF
MOVF
MULWF
BTFSC
SUBWF
MOVF
BTFSC
SUBWF
Cycles
(Max)
242
254
69
91
28
40
1
6
ARG1, W
ARG2
ARG1, W
ARG2
ARG2, SB
PRODH, F
ARG2, W
ARG1, SB
PRODH, F
@ 40 MHz
24.2 μs
25.4 μs
100 ns
600 ns
6.9 μs
9.1 μs
2.8 μs
4.0 μs
8 x 8 UNSIGNED
MULTIPLY ROUTINE
8 x 8 SIGNED MULTIPLY
ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
@ 10 MHz
102.6 μs
27.6 μs
36.4 μs
96.8 μs
16.0 μs
11.2 μs
Time
400 ns
2.4 μs
DS41303D-page 103
- ARG1
- ARG2
@ 4 MHz
242 μs
254 μs
69 μs
91 μs
28 μs
40 μs
1 μs
6 μs

Related parts for PIC18F26J50-I/SP