ST7FLITEU09M3 STMicroelectronics, ST7FLITEU09M3 Datasheet - Page 47

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ST7FLITEU09M3

Manufacturer Part Number
ST7FLITEU09M3
Description
IC MCU 8BIT 2K FLASH 8SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITEU09M3

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
ST7FLITEUx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
ICC
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
 Details

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ST7LITEU05 ST7LITEU09
Note:
Caution:
8.4.2
Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur
in the application, it is recommended to pull V
conditions. Refer to circuit example in
The LVD is an optional function which can be selected by option byte. See
page
disabled, an external circuitry must be used to ensure a proper power-on reset.
It is recommended to make sure that the V
device is exiting from Reset, to ensure the application functions properly.
Make sure the right combination of LVD and AVD thresholds is used as LVD and AVD levels
are not correlated. Refer to
more details.
If an LVD reset occurs after a watchdog reset has occurred, the LVD will take priority and will
clear the watchdog flag.
Figure 19. Low voltage detector vs reset
Figure 20. Reset and supply management block diagram
Auxiliary voltage detector (AVD)
The voltage detector function (AVD) is based on an analog comparison between a V
and V
reference value for falling voltage is lower than the V
voltage in order to avoid parasitic detection (hysteresis).
The output of the AVD comparator is directly readable by the application software through a
real time status bit (AVDF) in the SICSR register. This bit is read only.
127. It allows the device to be used without any external Reset circuitry. If the LVD is
IT+(AVD)
V
V
RESET
IT+
IT-
(LVD)
RESET
(LVD)
V
V
SS
DD
reference value and the V
V
DD
RESET SEQUENCE
MANAGER
Section 13.3.2 on page 98
(RSM)
TIMER (WDG)
Figure 67 on page 118
WATCHDOG
DD
DD
main supply voltage (V
SICSR
DD
supply voltage rises monotonously when the
7
0
V
down to 0V to ensure optimum restart
hys
SYSTEM INTEGRITY MANAGEMENT
1
IT+(AVD)
AUXILIARY VOLTAGE
1
LOW VOLTAGE
and
DETECTOR
DETECTOR
0
(AVD)
(LVD)
0
Section 13.3.3 on page 98
reference value for rising
LVD
and note 4.
RF
STATUS FLAG
AVD
F
AVD
AVD Interrupt Request
AVD
IE
0
). The V
Section 15.1 on
IT-(AVD)
Interrupts
IT-(AVD)
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for

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