ST7FLITEU09M3 STMicroelectronics, ST7FLITEU09M3 Datasheet - Page 79

• Manufacturer Part Number: ST7FLITEU09M3
• Description: IC MCU 8BIT 2K FLASH 8SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEU09M3

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ST7FLITEUx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: ICC
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• For Use With: 497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Details

ST7LITEU05 ST7LITEU09
Auto reload register (ATRH)
Reset value: 0000 0000 (00h)
Auto reload register (ATRL)
Reset value: 0000 0000 (00h)
Bits 15:12 = Reserved, must be kept cleared.
Bits 11:0 = ATR[11:0] Autoreload Register.
PWM0 duty cycle register high (DCR0H)
Reset value: 0000 0000 (00h)
PWM0 duty cycle register low (DCR0L)
Reset Value: 0000 0000 (00h)
Bits 15:12 = Reserved, must be kept cleared.
Bits 11:0 = DCR[11:0] PWMx duty cycle value
DCR7
ATR7
15
15
This is a 12-bit register which is written by software. The ATR register value is
automatically loaded into the upcounter when an overflow occurs. The register value is
used to set the PWM frequency.
This 12-bit value is written by software. The high register must be written first.
In PWM mode (OE0=1 in the PWMCR register) the DCR[11:0] bits define the duty
cycle of the PWM0 output signal (see
the PWMCR register) they define the value to be compared with the 12-bit upcounter
value.
0
7
0
7
DCR6
ATR6
0
0
DCR5
ATR5
0
0
DCR4
ATR4
0
0
Read/Write
Read/Write
Read/Write
Read/Write
Figure
ATR11
DCR11
DCR3
ATR3
38). In Output Compare mode, (OE0=0 in
ATR10
DCR10
DCR2
ATR2
On-chip peripherals
DCR9
DCR1
ATR9
ATR1
DCR8
DCR0
ATR8
ATR0
0
8
0
8
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