ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 128

• Manufacturer Part Number: ST7FLITE49K2T6TR
• Description: IC MCU 8BIT 8K FLASH 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE49K2T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLITE4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• For Use With: 497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

On-chip peripherals
Note:
128/245
There is a locking mechanism for transferring the OCiR value to the buffer. After a write to
the OCiHR register, transfer of the new compare value to the buffer is inhibited until OCiLR
is also written.
Unlike in output compare mode, the compare function is always enabled in PWM mode.
Procedure
To use pulse width modulation mode:
1.
2.
3.
4.
Figure 68. Pulse width modulation cycle
If OLVL = 1 and OLVL2 = 0 the length of the positive pulse is the difference between the
OC2R and OC1R registers.
If OLVL1 = OLVL2 a continuous signal is seen on the OCMP1 pin.
Load the OC2R register with the value corresponding to the period of the signal using
the formula in the opposite column.
Load the OC1R register with the value corresponding to the period of the pulse if
(OLVL1 = 0 and OLVL2 = 1) using
Select the following in the CR1 register:
Using the OLVL1 bit, select the level to be applied to the OCMP1 pin after a successful
comparison with OC1R register.
Using the OLVL2 bit, select the level to be applied to the OCMP1 pin after a successful
comparison with OC2R register.
Select the following in the CR2 register:
Set OC1E bit: the OCMP1 pin is then dedicated to the output compare 1 function.
Set the PWM bit.
Select the timer clock (CC[1:0])
= OC1R
= OC2R
counter
counter
When
When
(see: Timer A control register 2 (TACR2) on page
Pulse width modulation cycle
Equation
OCMP1 = OLVL2
OCMP1 = OLVL1
Counter is reset
5.
ICF1 bit is set
to FFFCh
ST7LITE49K2
132).