ST7FLITE49K2T6TR STMicroelectronics, ST7FLITE49K2T6TR Datasheet - Page 59

• Manufacturer Part Number: ST7FLITE49K2T6TR
• Description: IC MCU 8BIT 8K FLASH 32LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITE49K2T6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLITE4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLI49M-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• For Use With: 497-8399 - BOARD EVAL ST7LITE49M/STLED316S497-5858 - EVAL BOARD PLAYBACK ST7FLITE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ST7LITE49K2
8.5
8.5.1
8.5.2
Description of interrupt registers
CPU CC register interrupt bits
Reset value: 111x 1010(xAh)
Bits 5, 3 = I1, I0 Software interrupt priority bits
Table 15.
Interrupt software priority registers (ISPRx)
All ISPRx register bits are read/write except bit 7:4 of ISPR3 which are read only.
Reset value: 1111 1111 (FFh)
ISPRx registers contain the interrupt software priority of each interrupt vector. Each interrupt
vector (except RESET and TRAP) has corresponding bits in these registers to define its
software priority. This correspondence is shown in
Each I1_x and I0_x bit value in the ISPRx registers has the same meaning as the I1 and I0
bits in the CC register.
These two bits indicate the current interrupt software priority (see
These two bits are set/cleared by hardware when entering in interrupt. The loaded
value is given by the corresponding bits in the interrupt software priority registers
(ISPRx).
They can be also set/cleared by software with the RIM, SIM, HALT, WFI, IRET and
PUSH/POP instructions (see
TRAP and RESET events can interrupt a level 3 program.
7
1
ISPR0
ISPR1
ISPR2
ISPR3
Level 3 (= interrupt disable*)
Interrupt software priority
Setting the interrupt software priority
1
Level 0 (main)
I1_11
I1_3
I1_7
7
1
Level 1
Level 2
I1
I0_11
I0_3
I0_7
1
Table 17: Dedicated interrupt instruction
I1_10
I1_2
I1_6
1
H
Read/write
I0_10
I0_2
I0_6
1
I0
Table
Level
High
Low
I1_1
I1_5
I1_9
16.
1
N
I0_1
I0_5
I0_9
1
I1
1
0
1
Table
Z
set).
I1_12
I1_0
I1_4
I1_8
15).
Interrupts
I0
0
1
0
1
I0_12
I0_0
I0_4
I0_8
C
0
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