W78E516DPG Nuvoton Technology Corporation of America, W78E516DPG Datasheet - Page 34

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W78E516DPG

Manufacturer Part Number
W78E516DPG
Description
IC MCU 8-BIT 64K FLASH 44-PLCC
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet

Specifications of W78E516DPG

Core Processor
8052
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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0
Port 4
Mnemonic: P4
Port 4, SFR P4 at address D8H, is a 4-bit multipurpose programmable I/O port. Each bit can be
configured individually by software. The Port 4 has four different operation mode:
In mode 0, P4.0−P4.3 is a bi-directional I/O port which is same as port 1. P4.2 and P4.3 also serve as
external interrupt
In mode 1, P4.0−P4.3 are read data strobe signals which are synchronized with RD signal at specified
addresses. These signals can be used as chip-select signals for external peripherals.
In mode 2 , P4.0−P4.3 are write data strobe signals which are synchronized with WR signal at
specified addresses. These signals can be used as chip-select signals for external peripherals.
In mode 3, P4.0−P4.3 are read data strobe signals which are synchronized with RD or WR signal at
specified addresses. These signals can be used as chip-select signals for external peripherals.
When Port 4 is configured with the feature of chip-select signals, the chip-select signal address range
depends on the contents of the SFR P4xAH, P4xAL, P4CONA and P4CONB. The registers P4xAH
and P4xAL contain the 16-bit base address of P4.x. The registers P4CONA and P4CONB contain the
control bits to configure the Port 4 operation mode.
Here is an example to program the P4.0 as a write strobe signal at the I/O port address 1234H
~1237H and positive polarity, and P4.1~P4.3 are used as general I/O ports.
MOV P40AH,#12H
MOV P40AL,#34H
MOV P4CONA,#00001010B
MOV P4CONB,#00H
MOV P2ECON,#10H
Bit:
3
2
1
0
RS0
OV
F1
P
7
-
Register bank select bits:
Overflow flag:
Set when a carry was generated from the seventh bit but not from the 8
result of the previous operation, or vice-versa.
User Flag 1:
The General purpose flag that can be set or cleared by the user by software.
Parity flag:
Set/cleared by hardware to indicate odd/even number of 1’s in the accumulator.
INT3
6
-
and
RS1
0
0
1
1
INT2
Preliminary W78E516D/W78E058D Data Sheet
;P4.1~P4.3 as general I/O port which are the same as PORT1
;Write the P40SINV =1 to inverse the P4.0 write strobe polarity
;default is negative.
RS.1-0: Register bank selection bits:
5
-
;Define the base I/O address 1234H for P4.0 as an special function
;Define the P4.0 as a write strobe signal pin and the comparator
RS0
if enabled.
0
1
0
1
4
-
Register bank
0
1
2
3
- 34 -
3
P4.3
Address
00-07h
08-0Fh
10-17h
18-1Fh
2
P4.2
1
P4.1
Address: D8h
th
bit as a
0
P4.0

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