W78E516DPG Nuvoton Technology Corporation of America, W78E516DPG Datasheet - Page 60

• Manufacturer Part Number: W78E516DPG
• Description: IC MCU 8-BIT 64K FLASH 44-PLCC
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W78r

Specifications of W78E516DPG

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

The TI flag is set high in S6P2 following the end of transmission of the last bit. The serial port will
receive data when REN is 1 and RI is zero. The shift clock (TxD) will be activated and the serial port
will latch data on the rising edge of shift clock. The external device should therefore present data on
the falling edge on the shift clock. This process continues till all the 8 bits have been received. The RI
flag is set in S6P2 following the last rising edge of the shift clock on TxD. This will stop reception, till
the RI is cleared by software.
16.2 MODE 1
In Mode 1, the full duplex asynchronous mode is used. Serial communication frames are made up of
10 bits transmitted on TXD and received on RXD. The 10 bits consist of a start bit (0), 8 data bits (LSB
first), and a stop bit (1). On receive mode, the stop bit goes into RB8 in the SFR SCON. The baud rate
in this mode is variable. The serial baud can be programmed to be 1/16 or 1/32 of the Timer 1
overflow. Since the Timer 1 can be set to different reload values, a wide variation in baud rates is
possible.
Transmission begins with a write to SBUF. The serial data is brought out on to TxD pin at S6P2
following the first roll-over of divide by 16 counter. The next bit is placed on TxD pin at S6P2 following
the next rollover of the divide by 16 counter. Thus the transmission is synchronized to the divide by 16
counters and not directly to the write to SBUF signal. After all 8 bits of data are transmitted, the stop
bit is transmitted. The TI flag is set in the S6P2 state after the stop bit has been put out on TxD pin.
This will be at the 10th rollover of the divide by 16 counters after a write to SBUF.
Reception is enabled only if REN is high. The serial port actually starts the receiving of serial data,
with the detection of a falling edge on the RxD pin. The 1-to-0 detector continuously monitors the RxD
line, sampling it at the rate of 16 times the selected baud rate. When a falling edge is detected, the
divide by 16 counters is immediately reset. This helps to align the bit boundaries with the rollovers of
REN
SM2
RI
Fosc
1/12
0
P3.0 Alternate
Input Function
RXD
1/4
1
RX CLOCK
TX START
TX CLOCK
TX START
Write to
SBUF
Serial Controllor
Preliminary W78E516D/W78E058D Data Sheet
Figure 16- 1 Serial port mode 0
SHIFT CLOCK
LOAD SBUF
Data Bus
Internal
TX SHIFT
RX SHIFT
TI
RI
Receive Shift Register
- 60 -
Transmit Shift Register
CLOCK
SIN
PARIN
CLOCK
LOAD
PAROUT
SOUT
Serial Interrupt
SBUF
RXD
Output Function
TXD
Output Function
P3.0 Alternate
P3.1 Alternate
Read SBUF
Data Bus
Internal