W78E516DPG Nuvoton Technology Corporation of America, W78E516DPG Datasheet - Page 69

• Manufacturer Part Number: W78E516DPG
• Description: IC MCU 8-BIT 64K FLASH 44-PLCC
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W78r

Specifications of W78E516DPG

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Stop Timer & disable interrupt
Setting Timer and enable Timer
Setting erase operation mode:
(15ms for erasing operation)
Start Timer and enter IDLE
Timer Interrupt Service
Note: Setting the CHPCON from 00H to 03H will clear the program counter (PC).
(Erase 48KB APROM)
Is F04KBOOT Mode?
interrupt for wake-up .
MOV SFRCN,#22H
End of erase operation.
CPU will be wakened
(CHPCON.7=1 or
CHPCON.0=0)
by Timer interrupt.
Yes
(Erasing...)
Routine:
Mode.
PGM
Go
No
Reset the CHPCON Register:
MOV CHPENR,#87H
MOV CHPENR,#59H
MOV CHPCON,#03H
Preliminary W78E516D/ W78E058D Data Sheet
Get the parameters of new code
(Address and data bytes) through
I / O p o r t s , U A R T o r o t h e r
interfaces.
MOV SFRAH,#ADDRESS_H
MOV SFRAL,#ADDRESS_L
MOV SFRFD,#DATA
MOV SFRCN,#21H
Setting Timer and enable Timer
(150us for program operation)
Setting control registers for
- 69 -
End of Programming ?
interrupt for wake-up .
programming:
PGM
No
Publication Release Date: July 30, 2008
Part 2: 4KB LDROM
Procedure of Updating
the APROM
Yes
Software reset CPU and
re- boot f rom t he48KB
APROM.
MOV CHPENR,#87H
MOV CHPENR,#59H
MOV CHPCON,#83H
Executing new code from
address 00H in the 48KB
F04KBOOT Mode ?
Is currently in the
APROM.
END
No
Hardware Reset to re-
boot from new 48KB
APROM. (S/W reset is
invalid in F04KBOOT
Mode)
Yes
Revision A01