W78E516DPG Nuvoton Technology Corporation of America, W78E516DPG Datasheet - Page 53

• Manufacturer Part Number: W78E516DPG
• Description: IC MCU 8-BIT 64K FLASH 44-PLCC
• Manufacturer: Nuvoton Technology Corporation of America
• Series: W78r

Specifications of W78E516DPG

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 36
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

In Mode 2, the timer/counter is in the Auto Reload Mode. In this mode, TLx acts as an 8-bit count
register, while THx holds the reload value. When the TLx register overflows from FFh to 00h, the TFx
bit in TCON is set and TLx is reloaded with the contents of THx, and the counting process continues
from here. The reload operation leaves the contents of the THx register unchanged. Counting is
enabled by the TRx bit and proper setting of GATE and INTx . As in the other two modes 0 and 1
mode 2 allows counting of clock/12 or pulses on pin Tn.
Mode 3 has different operating methods for the two timer/counters. For timer/counter 1, mode 3 simply
freezes the counter. Timer/Counter 0, however, configures TL0 and TH0 as two separate 8 bit count
registers in this mode. The logic for this mode is shown in the figure. TL0 uses the Timer/Counter 0
(GATE=TMOD.7)
GATE=TMOD.3
(GATE=TMOD.7)
(TR1=TCON.6)
GATE=TMOD.3
TR0=TCON.4
(TR1=TCON.6)
14.2.3 Mode 2
14.2.4 Mode 3
(INT1=P3.3)
TR0=TCON.4
INT0=P3.2
(T1=P3.5)
(INT1=P3.3)
T0=P3.4
INT0=P3.2
(T1=P3.5)
T0=P3.4
Fosc
Fosc
1/12
1/12
Figure 14- 1 Timer/Counters 0 & 1 in Mode 0,1
Preliminary W78E516D/ W78E058D Data Sheet
Figure 14- 2 Timer/Counter 0 & 1 in Mode 2
Timer/Counter Mode2
0
1
0
1
(C/T=TMOD.6)
C/T=TMOD.2
(C/T=TMOD.6)
C/T=TMOD.2
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0
0
0
Publication Release Date: July 30, 2008
(TL1)
(TH1)
TL0
(TL1)
TL0
TH0
4
(M1, M0=TMOD.5, TMOD.4)
M1, M0=TMOD.1, TMOD.0
7
7
7
00
11
TFx
(TF1)
TF0
TFx
(TF1)
TF0
0
(TH1)
TH0
Revision A01
Interrupt
Interrupt
7