MC908QY2AMDTE Freescale Semiconductor, MC908QY2AMDTE Datasheet - Page 51

• Manufacturer Part Number: MC908QY2AMDTE
• Description: IC MCU 8BIT 1.5K FLASH 16TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908QY2AMDTE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 1.5KB (1.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-TSSOP
• Processor Series: HC08QY
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Chapter 4
Auto Wakeup Module (AWU)
4.1 Introduction
This section describes the auto wakeup module (AWU). The AWU generates a periodic interrupt during
stop mode to wake the part up without requiring an external signal.
AWU.
4.2 Features
Features of the auto wakeup module include:
Freescale Semiconductor
OSCENINSTOP (FROM CONFIG2)
BUSCLKX2
•
•
•
•
•
RESET
BUSCLKX2
One internal interrupt with separate interrupt enable bit, sharing the same keyboard interrupt vector
and keyboard interrupt mask bit
Exit from low-power stop mode without external signals
Selectable timeout periods
Dedicated low-power internal oscillator separate from the main system clock sources
Option to allow bus clock source to run the AWU if enabled in STOP
EN
INT RC OSC
CLK
CLRLOGIC
Figure 4-1. Auto Wakeup Interrupt Request Generation Logic
COPRS (FROM CONFIG1)
32 kHz
RST
CLEAR
M
U
X
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
RESET
AWUIE
CLK
SHORT
AUTOWUGEN
ISTOP
OVERFLOW
RST
1 = DIV 2
0 = DIV 2
9
14
RESET
ACKK
Figure 4-1
V
DD
D
E
R
Q
is a block diagram of the
TO KBI INTERRUPT LOGIC
(SEE
TO PTA READ, BIT 6
Figure
9-2)
AWUIREQ
AWUL
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