MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 501

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MC9S12XET256CAG

Manufacturer Part Number
MC9S12XET256CAG
Description
MCU 16BIT 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XET256CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 12
Pierce Oscillator (S12XOSCLCPV2)
12.1
The Pierce oscillator (XOSC) module provides a robust, low-noise and low-power clock source. The
module will be operated from the V
of external components. It is designed for optimal start-up margin with typical crystal oscillators.
12.1.1
The XOSC will contain circuitry to dynamically control current gain in the output amplitude. This ensures
a signal with low harmonic distortion, low power and good noise immunity.
12.1.2
Two modes of operation exist:
The oscillator mode selection is described in the Device Overview section, subsection Oscillator
Configuration.
Freescale Semiconductor
Revision
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Number
V01.05
V02.00
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
1. Loop controlled Pierce (LCP) oscillator
2. External square wave mode featuring also full swing Pierce (FSP) without internal bias resistor
High noise immunity due to input hysteresis
Low RF emissions with peak-to-peak swing limited dynamically
Transconductance (gm) sized for optimum start-up margin for typical oscillators
Dynamic gain control eliminates the need for external current limiting resistor
Integrated resistor eliminates the need for external bias resistor in loop controlled Pierce mode.
Low power consumption:
— Operates from 1.8 V (nominal) supply
— Amplitude control limits power
Clock monitor
Introduction
Features
Modes of Operation
04 Aug 2006
19 Jul 2006
Revision
Date
Sections
Affected
MC9S12XE-Family Reference Manual , Rev. 1.23
DDPLL
Table 12-1. Revision History
- All xclks info was removed
- Incremented revision to match the design system spec revision
supply rail (1.8 V nominal) and require the minimum number
Description of Changes
501

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