MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 680

• Manufacturer Part Number: MC9S12XET256CAG
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XET256CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
18.1.4
Figure 18-1
18.2
The PIT module has no external pins.
18.3
This section consists of register descriptions in address order of the PIT. Each description includes a
standard register diagram with an associated figure number. Details of register bit and field function follow
the register diagrams, in bit order.
680
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
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Bus Clock
Run mode
This is the basic mode of operation.
Wait mode
PIT operation in wait mode is controlled by the PITSWAI bit located in the PITCFLMT register.
In wait mode, if the bus clock is globally enabled and if the PITSWAI bit is clear, the PIT operates
like in run mode. In wait mode, if the PITSWAI bit is set, the PIT module is stalled.
Stop mode
In full stop mode or pseudo stop mode, the PIT module is stalled.
Freeze mode
PIT operation in freeze mode is controlled by the PITFRZ bit located in the PITCFLMT register.
In freeze mode, if the PITFRZ bit is clear, the PIT operates like in run mode. In freeze mode, if the
PITFRZ bit is set, the PIT module is stalled.
External Signal Description
Register Definition
Block Diagram
shows a block diagram of the PIT module.
Micro Timer 0
Micro Timer 1
8-Bit
8-Bit
MC9S12XE-Family Reference Manual , Rev. 1.23
Micro Time
Base 0
Micro
Time
Base 1
Figure 18-1. PIT24B4C Block Diagram
16-Bit Timer 0
16-Bit Timer 1
16-Bit Timer 2
16-Bit Timer 3
Time-Out 0
Time-Out 1
Time-Out 2
Time-Out 3
Interface
Interface
Interface
Interface
Freescale Semiconductor
Interrupt 0
Trigger 0
Interrupt 1
Trigger 1
Interrupt 2
Trigger 2
Interrupt 3
Trigger 3