HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 85

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2.9
2.9.1
The BSET, BCLR, BNOT, BST, and BIST instructions are used to read data in bytes, then, after
bit manipulation, they write data in bytes again. Therefore, special care is necessary to use these
instructions for the registers and the ports that include write-only bit.
The BCLR instruction can be used to clear the flags in the internal I/O registers to 0. In this time,
if it is obvious that the flag has been set to 1 in the interrupt processing routine or other
processing, there is no need to read the flag beforehand.
Notes: From any state, a transition to hardware standby mode occurs when STBY goes low.
Request for
exception
Usage Notes
Usage Notes on Bit Manipulation Instructions
Exception handling state
Program execution state
handling
* From any state except hardware standby mode, a transition to the reset state
occurs whenever RES goes low. A transition can also be made to the reset state
when the watchdog timer overflows.
exception
handling
End of
Figure 2.13 State Transitions
SLEEP instruction
Reset state
*
Rev. 7.00 Sep. 11, 2009 Page 49 of 566
request
Bus-released state
Program halt state
Bus
bus request
End of
REJ09B0211-0700
Section 2 CPU