HD6417034AFI20 Renesas Electronics America, HD6417034AFI20 Datasheet - Page 150

• Manufacturer Part Number: HD6417034AFI20
• Description: IC SUPERH MPU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 8 Bus State Controller (BSC)
Bit 6—Compare Match Interrupt Enable (CMIE): Enables or disables the compare match
interrupt (CMI) generated when CMF is set to 1 in RTCSR (RTCNT value = RTCOR value).
When cleared to 0, the CMI interrupt is disabled; when set to 1, it is enabled.
Bit 6: CMIE
0
1
Bits 5–3—Clock Select Bits 2–0 (CKS2–CKS0): These bits select the clock input to RTCNT
from among the seven types of clocks created by dividing the system clock ( ). When the input
clock is selected with the CKS2–CKS0 bits, RTCNT starts to increment.
Bit 5: CKS2
0
1
Bits 2–0—Reserved: These bits are always read as 0. The write value should always be 0.
8.2.8
The refresh timer counter (RTCNT) is a 16-bit read/write register that is used as an 8-bit upcounter
that generates refresh or interrupt requests. When the input clock is selected by clock select bits 2–
0 (CKS2–CKS0) in RTCSR, that clock makes the RTCNT start incrementing. When the values of
RTCNT and the refresh time constant register (RTCOR) match, RTCNT is cleared to H'0000 and
the CMF flag in RTCSR is set to 1. When the RFSHE bit in RCR is also set to 1, a CAS-before-
RAS refresh is performed. When the CMIE bit in RTCSR is also set to 1, a compare match
interrupt (CMI) is generated.
Bits 15–8 are reserved and are not incremented. These bits are always read as 0.
RTCNT is initialized to H'0000 by a power-on reset, but is not initialized by a manual reset or in
standby mode.
Rev. 7.00 Jan 31, 2006 page 122 of 658
REJ09B0272-0700
Refresh Timer Counter (RTCNT)
Bit 4: CKS1
0
1
0
1
Description
Compare match interrupt request (CMI) is disabled
Compare match interrupt request (CMI) is enabled
Bit 3: CKS0
0
1
0
1
0
1
0
1
Description
Clock input disabled
/2
/8
/32
/128
/512
/2048
/4096
(Initial value)
(Initial value)