HD6417034AFI20 Renesas Electronics America, HD6417034AFI20 Datasheet - Page 365

• Manufacturer Part Number: HD6417034AFI20
• Description: IC SUPERH MPU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7030r

Specifications of HD6417034AFI20

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

When a compare match B occurs before the compare match A, the 0 data transfer can be
performed before the 1 data transfer, so a non-overlapping waveform can be output. In such cases,
be sure not to change the NDR contents until the compare match A after the compare match B
occurs (non-overlap period). This can be ensured by writing the next data to NDR in the IMIA
interrupt handling routine. The DMAC can also be started using an IMIA interrupt. However,
these write operations should be performed prior to the next compare match B. The timing is
shown in figure 11.10.
Compare
Compare
match A
match B
NDR
DR
Figure 11.10 Non-Overlap Operation and NDR Write Timing
disable period
0 output
NDR write
0/1 output
NDR write
Section 11 Programmable Timing Pattern Controller (TPC)
NDR write period
Rev. 7.00 Jan 31, 2006 page 337 of 658
disable period
0 output
NDR write
0/1 output
NDR write
NDR write period
REJ09B0272-0700