UPD70F3737GC-UEU-AX Renesas Electronics America, UPD70F3737GC-UEU-AX Datasheet - Page 286

• Manufacturer Part Number: UPD70F3737GC-UEU-AX
• Description: MCU 32BIT V850ES/JX3-L 100-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3-Lr

Specifications of UPD70F3737GC-UEU-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 20MHz
• Number Of I /o: 84
• Core Processor: RISC
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Program Memory Size: 128KB (128K x 8)
• Data Converters: A/D 12x10b, D/A 2x8b
• Oscillator Type: Internal
• Peripherals: DMA, LVD, PWM, WDT
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Core Size: 32-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.5.7
is set to 1. Each time the valid edge input to the TIPnm pin has been detected, the count value of the 16-bit counter is
stored in the TPnCCRm register, and the 16-bit counter is cleared to 0000H.
signal (INTTPnCCm) occurs.
TPnIOC1 register for the unused pins.
286
In the pulse width measurement mode, 16-bit timer/event counter P starts counting when the TPnCTL0.TPnCE bit
The interval of the valid edge can be measured by reading the TPnCCRm register after a capture interrupt request
Select either the TIPn0 or TIPn1 pin as the capture trigger input pin. Specify “No edge detected” by using the
Remark
Pulse width measurement mode (TPnMD2 to TPnMD0 bits = 110)
trigger input)
trigger input)
TIPn0 pin
TIPn1 pin
(capture
(capture
n = 0 to 5
m = 0, 1
Figure 7-34. Configuration in Pulse Width Measurement Mode
detector
detector
Edge
Edge
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
selection
TPnCE bit
Count
clock
Preliminary User’s Manual U18953EJ1V0UD
TPnCCR0 register
(capture)
TPnCCR1 register
Clear
16-bit counter
(capture)
INTTPnOV signal
INTTPnCC0 signal
INTTPnCC1 signal