ATMEGA103L-4AC Atmel, ATMEGA103L-4AC Datasheet - Page 75
ATMEGA103L-4AC
Manufacturer Part Number
ATMEGA103L-4AC
Description
IC MCU 128K 4MHZ A/D LV 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA103-6AC.pdf
(141 pages)
2.ATMEGA103-6AC.pdf
(4 pages)
3.ATMEGA103L-4AC.pdf
(4 pages)
Specifications of ATMEGA103L-4AC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK501 - ADAPTER KIT FOR 64PIN AVR MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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- Download datasheet (3Mb)
Analog Comparator
Analog Comparator Control
and Status Register – ACSR
0945I–AVR–02/07
The analog comparator compares the input values on the positive input PE2 (AC+) and
negative input PE3 (AC-). When the voltage on the positive input PE2 (AC+) is higher
than the voltage on the negative input PE3 (AC-), the Analog Comparator Output (ACO)
is set (one). The output of the comparator can be set to trigger the Timer/Counter1 Input
Capture function. In addition, the comparator can trigger a separate interrupt, exclusive
to the analog comparator. The user can select interrupt triggering on comparator output
rise, fall or toggle. A block diagram of the comparator and its surrounding logic is shown
in Figure 44.
Figure 44. Analog Comparator Block Diagram
• Bit 7 – ACD: Analog Comparator Disable
When this bit is set (one), the power to the analog comparator is switched off. This bit
can be set at any time to turn off the analog comparator. This will reduce power con-
sumption in active and Idle mode. When changing the ACD bit, the Analog Comparator
interrupt must be disabled by clearing the ACIE bit in ACSR. Otherwise, an interrupt can
occur when the bit is changed.
• Bit 6 – Res: Reserved Bit
This bit is a reserved bit in the ATmega103(L) and will always read as zero.
• Bit 5 – ACO: Analog Comparator Output
ACO is directly connected to the comparator output.
• Bit 4 – ACI: Analog Comparator Interrupt Flag
This bit is set (one) when a comparator output event triggers the interrupt mode defined
by ACI1 and ACI0. The Analog Comparator Interrupt routine is executed if the ACIE bit
is set (one) and the I-bit in SREG is set (one). ACI is cleared by hardware when execut-
Bit
$08 ($28)
Read/Write
Initial Value
(AC+)
(AC-)
PE2
PE3
ACD
ACD
R/W
7
0
+
-
VCC
R
6
–
0
ACO
R
X
5
ACIS1
INTERRUPT
SELECT
R/W
ACI
4
0
ACIS0
ACIE
R/W
3
0
ACIE
ACIC
ACO
ACIC
R/W
2
0
ATmega103(L)
ACIS1
R/W
1
0
ANALOG
COMPARATOR
IRQ
TO T/C1 CAPTURE
TRIGGER MUX
ACI
ACIS0
R/W
0
0
ACSR
75
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