ATMEGA88PV-10AU Atmel, ATMEGA88PV-10AU Datasheet - Page 252

MCU AVR 8K ISP FLSH 10MHZ 32TQFP

ATMEGA88PV-10AU

Manufacturer Part Number
ATMEGA88PV-10AU
Description
MCU AVR 8K ISP FLSH 10MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88PV-10AU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, UART
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
10MHz
Rohs Compliant
Yes
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA88PV-10AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA88PV-10AUR
Manufacturer:
Atmel
Quantity:
10 000
8025L–AVR–7/10
In Free Running mode, a new conversion will be started immediately after the conversion com-
pletes, while ADSC remains high. For a summary of conversion times, see
253.
Figure 23-4. ADC Timing Diagram, First Conversion (Single Conversion Mode)
Figure 23-5. ADC Timing Diagram, Single Conversion
Figure 23-6. ADC Timing Diagram, Auto Triggered Conversion
Cycle Number
ADC Clock
Trigger
Source
ADATE
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADEN
ADSC
ADIF
ADCH
ADCL
Prescaler
Reset
1
1
2
MUX and REFS
Update
MUX and REFS
Update
1
2
MUX and REFS
Update
12
2
3
13
Sample & Hold
3
4
Sample &
Hold
14
4
5
15
5
6
Sample & Hold
16
6
First Conversion
17
7
One Conversion
18
7
8
One Conversion
19
8
9
ATmega48P/88P/168P
20
9
10
Conversion
Complete
21
10
Conversion
11
Complete
22
Conversion
Complete
11
23
12
24
12
13
25
13
Sign and MSB of Result
Sign and MSB of Result
LSB of Result
Table 23-1 on page
Next Conversion
Sign and MSB of Result
1
Next
Conversion
1
LSB of Result
LSB of Result
2
2
MUX and REFS
Update
Next Conversion
MUX and REFS
Update
1
Prescaler
Reset
3
3
2
252

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