IC MCU OTP 8BIT 1K 20DIP

COP8SAA720N9

Manufacturer Part NumberCOP8SAA720N9
DescriptionIC MCU OTP 8BIT 1K 20DIP
ManufacturerNational Semiconductor
SeriesCOP8™ 8SA
COP8SAA720N9 datasheet
 


Specifications of COP8SAA720N9

Core ProcessorCOP8Core Size8-Bit
Speed10MHzConnectivityMicrowire/Plus (SPI)
PeripheralsPOR, PWM, WDTNumber Of I /o16
Program Memory Size1KB (1K x 8)Program Memory TypeOTP
Ram Size64 x 8Voltage - Supply (vcc/vdd)2.7 V ~ 5.5 V
Oscillator TypeInternalOperating Temperature0°C ~ 70°C
Package / Case20-DIP (0.300", 7.62mm)Lead Free Status / RoHS StatusContains lead / RoHS non-compliant
Eeprom Size-Data Converters-
Other names*COP8SAA720N9
COP8SAA720N9B
COP8SAA720NB
  
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6.0 Functional Description
memory mapped; therefore, I/O bits and register bits can be
directly and individually set, reset and tested. The accumu-
lator (A) bits can also be directly and individually tested.
RAM contents are undefined upon power-up.
TABLE 1. Program/Data Memory Sizes
Program
Data
Device
Memory
Memory
(Bytes)
(Bytes)
COP8SAA7
1024
COP8SAB7
2048
128
COP8SAC7
4096
128
6.4 ECON (CONFIGURATION) REGISTER
The ECON register is used to configure the user selectable
clock, security, power-on reset, WATCHDOG, and HALT
options. The register can be programmed and read only in
EPROM programming mode. Therefore, the register should
be programmed at the same time as the program memory.
The contents of the ECON register shipped from the factory
read 00 Hex (windowed device), 80 Hex (OTP device) or as
specified by the customer (ROM device).
The format of the ECON register is as follows:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
X
POR
SECURITY
CKI 2
CKI 1 WATCH
Bit 7
= x
This is for factory test. The polarity is al-
ways 0.
Bit 6
= 1
Power-on reset enabled.
= 0
Power-on reset disabled.
Bit 5
= 1
Security enabled. EPROM read and write
are not allowed.
= 0
Security disabled. EPROM read and write
are allowed.
Bits 4, 3 = 0, 0 External CKI option selected. G7 is avail-
able as a HALT restart and/or general pur-
pose input. CKI is clock input.
= 0, 1 R/C oscillator option selected. G7 is avail-
able as a HALT restart and/or general pur-
pose input. CKI clock input. Internal R/C
components are supplied for maximum
R/C frequency.
= 1, 0 Crystal oscillator with on-chip crystal bias
resistor disabled. G7 (CKO) is the clock
generator output to crystal/resonator.
= 1, 1 Crystal oscillator with on-chip crystal bias
resistor enabled. G7 (CKO) is the clock
generator output to crystal/resonator.
Bit 2
= 1
WATCHDOG feature disabled. G1 is a
general purpose I/O.
= 0
WATCHDOG feature enabled. G1 pin is
WATCHDOG output with waek pullup.
Bit 1
=
Reserved.
Bit 0
= 1
HALT mode disabled.
= 0
HALT mode enabled.
www.national.com
6.5 USER STORAGE SPACE IN EPROM
(Continued)
In addition to the ECON register, there are 8 bytes of
EPROM available for “user information”. ECON and these 8
bytes are outside of the code area and are not protected by
the security bit of the ECON register. Even when security is
set, information in the 8-byte USER area is both read and
write enabled allowing the user to read from and write into
the area at all times while still protecting the code from
unauthorized access.
User
Both ECON and USER area, 9 bytes total, are outside of the
normal address range of the EPROM and can not be ac-
Storage
cessed by the executing software. This allows for the stor-
(Bytes)
age of non-secured information. Typical uses are for storage
64
8
of serial numbers, data codes, version numbers, copyright
8
information, lot numbers, etc.
The COP8 assembler defines a special ROM section type,
8
CONF, into which the ECON and USER data may be coded.
Both ECON and User Data are programmed automatically
by programmers that are certified by National.
The following examples illustrate the declaration of ECON
and the User information.
Syntax:
[label:] .sect econ, conf
Bit 2
Bit 1
Bit 0
Example: The following sets a value in the ECON register
Reserved
HALT
and User Identification for a COP8SAC728M7. The ECON
DOG
bit values shown select options: Power-on enabled, Security
disabled, Crystal oscillator with on-chip bias disabled,
WATCHDOG enabled and HALT mode enabled.
.chip 8SAC
.sect econ, conf
.db
0x55
.db
'my v1.00'
.endsect
...
.end start
Note: All programmers certified for programming this family of parts will
support programming of the CONFiguration section. Please contact
National or your device programmer supplier for more information.
6.6 OTP SECURITY
The device has a security feature that, when enabled, pre-
vents external reading of the OTP program memory. The
security bit in the ECON register determines, whether secu-
rity is enabled or disabled. If the security feature is disabled,
the contents of the internal EPROM may be read.
If the security feature is enabled, then any attempt to
externally read the contents of the EPROM will result in
the value FF Hex being read from all program locations.
Under no circumstances can a secured part be read. In
addition, with the security feature enabled, the write opera-
tion to the EPROM program memory and ECON register is
inhibited. The ECON register is readable regardless of the
state of the security bit. The security bit, when set, cannot
be erased, even in windowed packages. If the security bit
is set in a device in a windowed package, that device may be
erased but will not be further programmable.
If security is being used, it is recommended that all other bits
in the ECON register be programmed first. Then the security
bit can be programmed.
16
.db
value
;1 byte,
;configures options
.db
.endsect<user information>
;up to 8 bytes
;por, extal, wd, halt
;user data declaration