MC9328MXLVM20R2 Freescale Semiconductor, MC9328MXLVM20R2 Datasheet - Page 20

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MC9328MXLVM20R2

Manufacturer Part Number
MC9328MXLVM20R2
Description
IC MCU I.MX 200MHZ 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MXLr
Datasheet

Specifications of MC9328MXLVM20R2

Core Processor
ARM9
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, I²C, Memory Stick, MMC/SD, SPI, SSI, UART/USART, USB
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
97
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
1.7 V ~ 3.3 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
256-MAPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9328MXLVM20R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC9328MXLVM20R2
Quantity:
199
Functional Description and Application Information
4
This section provides the electrical information including and timing diagrams for the individual modules
of the i.MXL.
4.1
All registers in the ETM9 are programmed through a JTAG interface. The interface is an extension of the
ARM920T processor’s TAP controller, and is assigned scan chain 6. The scan chain consists of a 40-bit
shift register comprised of the following:
The data to be written is scanned into the 32-bit data field, the address of the register into the 7-bit address
field, and a 1 into the read/write bit.
A register is read by scanning its address into the address field and a 0 into the read/write bit. The 32-bit
data field is ignored. A read or a write takes place when the TAP controller enters the UPDATE-DR state.
The timing diagram for the ETM9 is shown in
in
20
Figure
Ref No.
2a
2b
3a
3b
Functional Description and Application Information
32-bit data field
7-bit address field
A read/write bit
1
2.
Embedded Trace Macrocell
CLK frequency
Clock high time
Clock low time
Clock rise time
Clock fall time
Output Trace Port
(Half-Rate Clocking Mode)
TRACECLK
TRACECLK
Parameter
Table 9. Trace Port Timing Diagram Parameter Table
Figure 2. Trace Port Timing Diagram
MC9328MXL Technical Data, Rev. 8
Minimum
3a
1.3
0
3
1.8 ± 0.1 V
Figure
3b
2a
Maximum
2. See
85
4
3
4a
2b
Table 9
Valid Data
for the ETM9 timing parameters used
Minimum
0
2
2
1
3.0 ± 0.3 V
Valid Data
Maximum
Freescale Semiconductor
100
3
3
4b
MHz
Unit
ns
ns
ns
ns

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