MCF5214CVF66 Freescale Semiconductor, MCF5214CVF66 Datasheet - Page 731

• Manufacturer Part Number: MCF5214CVF66
• Description: IC MPU 32BIT COLDF 256-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xr

Specifications of MCF5214CVF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 142
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Package: 256MA-BGA
• Device Core: ColdFire
• Family Name: MCF521x
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 142
• Interface Type: QSPI/UART/I2C/CAN
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Freescale Semiconductor
0x19_0200–
0x19_0280–
0x19_0300–
0x19_0380–
0x19_000C
0x19_02FE
0x19_03FE
IPSABAR +
0x19_000A
0x19_000E
0x19_027E
0x19_037E
0x1A_0000
0x1A_0001
0x17_0002
0x17_0004
0x18_0000
0x18_0002
0x18_0004
0x19_0000
0x19_0006
0x19_0007
0x19_0008
0x19_0009
0x19_0010
0x19_0012
IPSBAR +
IPSBAR +
IPSBAR +
IPSBAR +
IPSBAR +
IPSBAR +
IPSBAR +
IPSBAR +
Address
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table A-3. Register Memory Map (continued)
Right Justified, Unsigned Result Register
Left Justified, Unsigned Result Register
QADC Module Configuration Register
Left Justified, Signed Result Register
Programmable Interrupt Timer 3 Registers
Conversion Command Word Table
PIT Control and Status Register 3
Port QA Data Direction Register
Port QB Data Direction Register
GPTA Compare Force Register
GPTA IC/OC Select Register
General Purpose Timer A Registers
QADC Control Register 0
QADC Control Register 1
QADC Control Register 2
QADC Status Register 0
QADC Status Register 1
PIT Modulus Register 2
PIT Modulus Register 3
Port QA Data Register
Port QB Data Register
PIT Count Register 2
PIT Count Register 3
QADC Registers
Name
GPTACFORC
QADCMCR
Mnemonic
RJURR0–
RJURR63
LJURR0–
LJURR63
GPTAIOS
PCNTR 2
PCNTR 3
LJSRR0–
LJSRR63
PORTQA
PORTQB
PCSR 3
DDRQA
DDRQB
QACR0
QACR1
QACR2
CCW0–
CCW63
QASR0
QASR1
PMR 2
PMR 3
64x16
64x16
64x16
64x16
Register Memory Map
Size
16
16
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
A-19