FAN6206MY Fairchild Semiconductor, FAN6206MY Datasheet - Page 12

• Manufacturer Part Number: FAN6206MY
• Description: Primary & Secondary Side PWM Controllers Secondry Synchronous Rectifier
• Manufacturer: Fairchild Semiconductor

Specifications of FAN6206MY

• Operating Supply Voltage: 30 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Output Voltage: 12 V
• Supply Current: 3 mA
• Package / Case: SOP-8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

© 2010 Fairchild Semiconductor Corporation
FAN6206 • Rev. 1.0.2
Linear-Predict Timing Control
When a dual-forward converter operates in CCM or
DCM; in PWM t
the primary winding and the secondary inductor starts to
rise linearly and store energy. The across voltage on
secondary winding is coupled from primary winding and
proportional to V
winding voltage through a voltage divider and acquire
the V
PWM turn-on period, SR controller produces a charge
current I
controller. On the other hand, at PWM turn-off period,
the energy stored in the secondary inductor is
discharged. The SR controller also detects the output
voltage level to modulate discharge current I
internal capacitor, CT. Once the internal capacitor
voltage reaches zero, SR controller turns off SR MOS
immediately.
R
terminal of Q
the LPC2 pin is pulled HIGH due to the secondary
winding coupled from primary winding. At this moment,
SR MOS is turned off and the internal body diode of SR
MOS is reverse-biased. During PWM turn-off period, the
potential on the primary winding reverses and the
internal body diode starts to conduct output current. The
voltage on the LPC2 pin is also pulled LOW to GND. R
is recommended as 10kΩ and the divided voltage level
on the LPC1 pin is suggested between 3V~5V. If the
voltage level of V
recommended as 105kΩ for R
turn-off timing of Q
as Figure 34 shows. If
off earlier.
4
is connected between the LPC2 pin and the drain
Figure 34. Turn-Off Timing of Freewheeling SR
IN
level. According to this detected V
CHG
to charge internal capacitor, CT, of the SR
4
. During PWM turn-on period, voltage on
ON
IN
4
. The SR controller can detect this
period, the V
O
is determined by the ratio
is 12V, the resistor values are
R
3
R
+
4
R
4
3
decreases, Q
IN
and 10kΩ for R
voltage is applied to
IN
level during
4
R
DISCHG
is turned
3
4
R
. The
+
4
R
of
4
2
12
Under-Voltage Lockout (UVLO)
The power-on and off thresholds are fixed at 8.5V and
7.5V. The VDD pin is connected to a 12V output voltage
terminal.
VDD Pin Over-Voltage Protection
The over-voltage conditions are usually caused by open
feedback loops. V
prevent damage if over voltage occurs. When the
voltage on the VDD pin exceeds 21V, the SR controller
turns off all of SR MOS operations.
DD
over-voltage protection is built in to
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