LFE2-12E-5TN144C Lattice, LFE2-12E-5TN144C Datasheet - Page 41

FPGA - Field Programmable Gate Array 12K LUTs 93 I/O DSP 1.2V -5 Spd

LFE2-12E-5TN144C

Manufacturer Part Number
LFE2-12E-5TN144C
Description
FPGA - Field Programmable Gate Array 12K LUTs 93 I/O DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet

Specifications of LFE2-12E-5TN144C

Number Of Macrocells
12000
Number Of Programmable I/os
93
Data Ram Size
226304
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFE2-12E-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Figure 2-35. Edge Clock, DLL Calibration and DQS Local Bus Distribution
Spans 16 PIOs
Spans 18 PIOs
DQS Input
Note: Bank 8 is not shown.
I/O
I/O
B
a
n
7
B
a
n
6
k
k
DDR_DLL
I/O Bank 5
(Left)
I/O Bank 0
2-38
I/O Bank 4
I/O Bank 1
DDR_DLL
(Right)
LatticeECP2/M Family Data Sheet
I/O
I/O
B
B
a
n
k
2
a
n
k
3
ECLK1
ECLK2
Delayed
DQS
Polarity Control
DQSXFER
DQS Delay
Control Bus
Architecture

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