LFE2-12E-5TN144C Lattice, LFE2-12E-5TN144C Datasheet - Page 70

• Manufacturer Part Number: LFE2-12E-5TN144C
• Description: FPGA - Field Programmable Gate Array 12K LUTs 93 I/O DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFE2-12E-5TN144C

• Number Of Macrocells: 12000
• Number Of Programmable I/os: 93
• Data Ram Size: 226304
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: TQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Register-to-Register Performance (Continued)
Derating Timing Tables
Logic timing provided in the following sections of this data sheet and the Diamond/ispLEVER design tools are worst
case numbers in the operating range. Actual delays at nominal temperature and voltage for best case process, can
be much better than the values given in the tables. The Diamond or ispLEVER design tools can provide logic timing
numbers at a particular temperature and voltage.
36x36 Multiplier
(All Registers)
18x18 Multiplier/Accumulate (Input and
Output Registers)
18x18 Multiplier-Add/Sub-Sum (All Reg-
isters)
DSP IP Functions
16-Tap Fully-Parallel FIR Filter
1024-pt, Radix 4, Decimation in 
Frequency FFT
8x8 Matrix Multiplier
Function
-7 Timing
3-18
372
295
420
304
227
223
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Units
MHz
MHz
MHz
MHz
MHz
MHz