LFE2-12E-5TN144C Lattice, LFE2-12E-5TN144C Datasheet - Page 69

• Manufacturer Part Number: LFE2-12E-5TN144C
• Description: FPGA - Field Programmable Gate Array 12K LUTs 93 I/O DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFE2-12E-5TN144C

• Number Of Macrocells: 12000
• Number Of Programmable I/os: 93
• Data Ram Size: 226304
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: TQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Typical Building Block Function Performance
Pin-to-Pin Performance (LVCMOS25 12mA Drive)
Register-to-Register Performance
Basic Functions
16-bit Decoder
32-bit Decoder
64-bit Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
1. These timing numbers were generated using the ispLEVER 8.0 design tool. Exact performance may vary with device and tool version. The
Basic Functions
16-bit Decoder
32-bit Decoder
64-bit Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
8-bit Adder
16-bit Adder
64-bit Adder
16-bit Counter
32-bit Counter
64-bit Counter
64-bit Accumulator
Embedded Memory Functions
512x36 Single Port RAM, EBR Output
Registers
1024x18 True-Dual Port RAM (Write
Through or Normal, EBR Output Regis-
ters)
1024x18 True-Dual Port RAM (Write
Through or Normal, PLC Output 
Registers)
Distributed Memory Functions
16x4 Pseudo-Dual Port RAM (One PFU)
32x4 Pseudo-Dual Port RAM
64x8 Pseudo-Dual Port RAM
DSP Functions
18x18 Multiplier (All Registers)
9x9 Multiplier (All Registers)
tool uses internal parameters that have been characterized but are not tested on every device.
Function
Function
-7 Timing
-7 Timing
3-17
599
542
417
847
803
660
577
591
500
306
488
378
260
253
370
370
280
819
521
435
420
420
3.8
4.5
5.0
3.2
3.4
3.5
4.0
1
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Units
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns