JS28F128P30BF75A NUMONYX, JS28F128P30BF75A Datasheet - Page 30

• Manufacturer Part Number: JS28F128P30BF75A
• Description: IC FLASH 128MBIT 65NM 56TSOP
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of JS28F128P30BF75A

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (8Mx16)
• Speed: 75ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 2 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-TFSOP (0.551", 14.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.2
Note:
8.3
Datasheet
30
by a logic signal, V
the device draws programming current from the V
Connections” on page 34
When V
Before issuing a new command, the Status Register contents should be examined and
then cleared using the Clear Status Register command. Any valid command can follow,
when word programming has completed.
Factory Word Programming
Factory word programming is similar to word programming in that it uses the same
commands and programming algorithms. However, factory word programming
enhances the programming performance with V
programming times during OEM manufacturing processes. Factory word programming
is not intended for extended use. See
for limitations when V
Buffered Programming
The device features a 32-word buffer to enable optimum programming performance.
For Buffered Programming, data is first written to an on-chip write buffer. Then the
buffer data is programmed into the flash memory array in buffer-size increments. This
can improve system programming performance significantly over non-buffered
programming.
When the Buffered Programming Setup command is issued (see
“Command Set” on page
availability of the buffer. SR[7] indicates buffer availability: if set, the buffer is
available; if cleared, the buffer is not available. To retry, issue the Buffered
Programming Setup command again, and re-check SR[7]. When SR[7] is set, the
buffer is ready for loading. (see
On the next write, a word count is written to the device at the buffer address. This tells
the device how many data words will be written to the buffer, up to the maximum size
of the buffer.
On the next write, a device start address is given along with the first data to be written
to the flash memory array. Subsequent writes provide additional device addresses and
data. All data addresses must lie within the start address plus the word count.
Optimum programming performance and lower power usage are obtained by aligning
the starting address at the beginning of a 32-word boundary (A[4:0] = 0x00). Crossing
a 32-word boundary during programming will double the total programming time.
After the last data is written to the buffer, the Buffered Programming Confirm command
must be issued to the original block address. The WSM begins to program buffer
contents to the flash memory array. If a command other than the Buffered
Programming Confirm command is written to the device, a command sequence error
occurs and Status Register bits SR[7,5,4] are set. If an error occurs while writing to the
array, the device stops programming, and Status Register bits SR[7,4] are set,
indicating a programming failure.
When Buffered Programming has completed, additional buffer writes can be initiated by
issuing another Buffered Programming Setup command and repeating the buffered
program sequence. Buffered programming may be performed with V
(see
the device with V
PP
= V
Section 13.2, “Operating Conditions” on page 52
PPL
, the device draws programming current from the V
PPL
must remain above V
PP
shows examples of device power supply configurations.
= V
PP
PPH
= V
24), Status Register information is updated and reflects the
).
PPH
.
Figure 36, “Buffer Program Flowchart” on page
PPL
Section 13.2, “Operating Conditions” on page 52
MIN to program the device. When V
PP
supply.
PP
= V
PPH
Figure 11, “Example VPP Supply
for limitations when operating
. This can enable faster
CC
supply. If V
Section 6.0,
PP
= V
PPL
PP
PP
August 2008
is driven
or V
306666-12
= V
82).
PPH
PPH
P30
,