JS28F128P30BF75A NUMONYX, JS28F128P30BF75A Datasheet - Page 97

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JS28F128P30BF75A

Manufacturer Part Number
JS28F128P30BF75A
Description
IC FLASH 128MBIT 65NM 56TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of JS28F128P30BF75A

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (8Mx16)
Speed
75ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TFSOP (0.551", 14.00mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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P30
Appendix C Revision History
August 2008
Order Number: 306666-12
September 2005
November 2005
November 2007
November 2007
Revision Date
February 2006
August 2005
August 2008
June - 2007
April 2005
April 2006
May-2006
May 2006
Revision
-001
-002
-003
-004
-005
-006
-007
-008
-009
-010
11
12
Initial Release
Revised discrete memory maps in
page 7
Added memory maps for 512-Mbit top parameter devices in
“Memory Maps” on page 7
Fixed size of Programming Region for 256-Mbit to be 8-Mbit in
“Memory Maps” on page 7
on page 29
Removed power supply sequencing requirement in
and Power-Down” on page 50
Updated conditions for
Updated CFI table in
Added note to
Device ID codes
Synchronous burst read operation is currently not supported for the TSOP package
Updated 512-Mbit Easy BGA Ball Height (symbol A1) in
Mechanical Specifications” on page 11
Updated read access speed for 265M TSOP package
Removed all references to 1 Gigabit.
• Added 52 MHz capabilities,
• Added TSOP Package information for 512 Mb throughout the document,
• Added
• Modified figures in
• Modified
• Modified Notes 5 & 6 to Reset Specifications table in
• Added additional note on 512 Mb capability in
• Updated the following tables to 52 MHz:
• Added notes 1, 2, and 3 to
• Correct typos and add clarifications
• Enabled specific burst operation on TSOP packages.
• Updated device commands table.
• Updaed description on synchronous burst operation.
• Added EOWL description.
• Updated flowcharts
• Updated for 65nm lithography
• Added W602 - Erase to Suspend
• Applied Numonyx branding.
• Corrected single word (65 nm) program time from 125 (typ) and 150 (max) to
page 6
page 21
Memory Map (Easy BGA and QUAD+ SCSP)” on page 9
“Reset Specifications” on page 50
OTP Block Mapping” on page 39
Specifications for 64/128- Mbit Densities” on page 56
Table 31, “AC Read Specifications for 256/512-Mbit
Densities” on page 57
150 (typ) and 456 (max) in
Specifications” on page 67
Section 1.3, “Virtual Chip Enable Description” on
,
Table 5, “512-Mbit Top and Bottom Parameter
,
Table 14, “Device ID codes” on page 28
Appendix A, “Common Flash Interface Tables”
Table 29, “Capacitance” on page 56
Section 4.1, “Dual-Die Configurations” on
Table 29, “Capacitance” on page 56
.
Table 34, “Program and Erase
and
Section 1.4, “Memory Maps” on
Description
.
Section 8.0, “Program Operation”
Table 30, “AC Read
.
,
Section 12.1, “Power-Up
Table 17, “Selectable
Figure 2, “Easy BGA
Section 12.2,
Section 1.4,
Section 1.4,
for stacked
Datasheet
and
,
.
97

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