S29GL128P90TFIR10 Spansion Inc., S29GL128P90TFIR10 Datasheet - Page 11

• Manufacturer Part Number: S29GL128P90TFIR10
• Description: IC, FLASH, 128MBIT, 90NS, TSOP-56
• Manufacturer: Spansion Inc.

Specifications of S29GL128P90TFIR10

• Memory Type: Flash
• Memory Size: 128Mbit
• Memory Configuration: 16M X 8 / 8M X 16
• Ic Interface Type: CFI, Parallel
• Access Time: 90ns
• Supply Voltage Range: 3.0 To 3.6 V
• Memory Case Style: TSOP
• Data Bus Width: 8 bit, 16 bit
• Architecture: Sectored
• Interface Type: Serial
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Maximum Operating Current: 50 mA
• Mounting Style: SMD/SMT
• Operating Temperature: + 85 C
• Package / Case: TSOP-56
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

2. Input/Output Descriptions & Logic Symbol
November 20, 2009 S29GL-P_00_A12
Table 2.1
DQ14–DQ0
WP#/ACC
DQ15/A-1
RESET#
Symbol
A25–A0
RY/BY#
BYTE#
WE#
OE#
CE#
V
V
V
NC
CC
SS
IO
identifies the input and output package connections provided on the device.
No Connect
Supply
Supply
Supply
Output
Type
Input
Input
Input
Input
Input
Input
Input
I/O
I/O
D a t a
Address lines for GL01GP
A24–A0 for GL512P
A23–A0 for GL256P,
A22–A0 for GL128P.
Data input/output.
DQ15: Data input/output in word mode.
A-1: LSB address input in byte mode.
Chip Enable.
Output Enable.
Write Enable.
Device Power Supply.
Versatile IO Input.
Ground.
Not connected internally.
Ready/Busy. Indicates whether an Embedded Algorithm is in progress or complete. At
V
Selects data bus width. At VIL, the device is in byte configuration and data I/O pins DQ0-
DQ7 are active and DQ15/A-1 becomes the LSB address input. At VIH, the device is in
word configuration and data I/O pins DQ0-DQ15 are active.
Hardware Reset. Low = device resets and returns to reading array data.
Write Protect/Acceleration Input. At V
outermost sectors. At V
unlock bypass mode. Should be at V
up; when unconnected, WP# is at V
S29GL-P MirrorBit
IL
, the device is actively erasing or programming. At High Z, the device is in ready.
S h e e t
Table 2.1 Input/Output Descriptions
®
Flash Family
HH
, accelerates programming; automatically places device in
IH
IH
IL
.
Description
, disables program and erase functions in the
for all other conditions. WP# has an internal pull-
11